- 25 11月, 2010 1 次提交
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由 Chris Metcalf 提交于
This change adds the first network driver for the tile architecture, supporting the on-chip XGBE and GBE shims. The infrastructure is present for the TILE-Gx networking drivers (another three source files in the new directory) but for now the the actual tilegx sources are waiting on releasing hardware to initial customers. Note that arch/tile/include/hv/* are "upstream" headers from the Tilera hypervisor and will probably benefit less from LKML review. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 07 7月, 2010 1 次提交
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由 Chris Metcalf 提交于
This code is used in other places in our system than in Linux, so to share it we now implement it as an inline function in our low-level <arch> headers, and instantiate it in one file in Linux's arch/tile/lib. The file is now cacheflush.c and is C code rather than the strangely-named and assembler-implemented __invalidate_icache.S. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 05 6月, 2010 1 次提交
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由 Chris Metcalf 提交于
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: NPaul Mundt <lethal@linux-sh.org>
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