1. 21 10月, 2011 1 次提交
  2. 22 9月, 2011 1 次提交
  3. 20 9月, 2011 1 次提交
  4. 05 6月, 2011 1 次提交
  5. 18 5月, 2011 1 次提交
    • C
      drm/i915/sdvo: Reorder i2c initialisation before ddc proxy · 56184e3d
      Chris Wilson 提交于
      The ddc proxy depends upon the underlying i2c bus being selected. Under
      certain configurations, the i2c-adapter functionality is queried during
      initialisation and so may trigger an OOPS during boot. Hence, we need to
      reorder the initialisation of the ddc proxy until after we hook up the i2c
      adapter for the SDVO device.
      
      The condition under which it fails is when the i2c_add_adapter calls
      into i2c_detect which will attempt to probe all valid addresses on the
      adapter iff there is a pre-existing i2c_driver with the same class as
      the freshly added i2c_adapter.
      
      So it appears to depend upon having compiled in (or loaded such a
      module before i915.ko) an i2c-driver that likes to futz over the
      i2c_adapters claiming DDC support.
      Reported-by: NMihai Moldovan <ionic@ionic.de>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NKeith Packard <keithp@keithp.com>
      Signed-off-by: NKeith Packard <keithp@keithp.com>
      56184e3d
  6. 23 2月, 2011 1 次提交
  7. 22 2月, 2011 1 次提交
  8. 11 2月, 2011 1 次提交
  9. 10 2月, 2011 1 次提交
  10. 26 1月, 2011 3 次提交
  11. 12 1月, 2011 1 次提交
  12. 23 12月, 2010 1 次提交
  13. 17 12月, 2010 1 次提交
  14. 10 12月, 2010 1 次提交
  15. 25 11月, 2010 1 次提交
  16. 24 11月, 2010 1 次提交
  17. 22 11月, 2010 1 次提交
  18. 22 10月, 2010 2 次提交
  19. 19 10月, 2010 1 次提交
  20. 28 9月, 2010 1 次提交
  21. 24 9月, 2010 2 次提交
  22. 21 9月, 2010 1 次提交
  23. 18 9月, 2010 1 次提交
    • C
      drm/i915: use GMBUS to manage i2c links · f899fc64
      Chris Wilson 提交于
      Use the GMBUS interface rather than direct bit banging to grab the EDID
      over DDC (and for other forms of auxiliary communication with external
      display controllers). The hope is that this method will be much faster
      and more reliable than bit banging for fetching EDIDs from buggy monitors
      or through switches, though we still preserve the bit banging as a
      fallback in case GMBUS fails.
      
      Based on an original patch by Jesse Barnes.
      
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      f899fc64
  24. 15 9月, 2010 6 次提交
  25. 14 9月, 2010 1 次提交
  26. 13 9月, 2010 1 次提交
  27. 12 9月, 2010 1 次提交
    • C
      drm/i915/sdvo: Poll command status 5 times without delay on read · b5c616a7
      Chris Wilson 提交于
      The documentation says that an SDVO command takes a maximum of 15us to be
      processed by the device, and that it is sufficient to read the status byte
      3 times (whilst the command is still in the PENDING state) for the driver
      to be confident that sufficient time has elapsed.
      
      We err on the safe side and try 5 times before giving up.
      
      The only question that remains: was the old behaviour derived by
      experiments with real hardware?
      
      A look into the murky history of UMS, implies that the behaviour was
      accidental and the current retry mechanism was solely designed to catch
      the status byte indicating PENDING with no reference to hardware
      behaviour. (commit ac9181c014638dbeb334b40b4029d0ccb2b7a0fc in
      xf86-video-intel)
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      b5c616a7
  28. 10 9月, 2010 2 次提交
  29. 08 9月, 2010 1 次提交
  30. 07 9月, 2010 1 次提交