With the intc dual prio register support in place it is now possible
to add the ipi vectors to x3.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

We need a secondary register member in struct intc_prio_reg to support
dual priority registers used by ipi on x3.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This makes sure the function prototype for setup_bootmem_node() gets
included. The file setup-shx3.c does not compile otherwise for
CONFIG_NUMA=n.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that NODES_SHIFT is bumped up, we can plug in the CSM block as
a separate node, too.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Wire up CPU#0 URAM as node 1 on SH-X3.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch converts the cpu specific interrupt setup code for x3 from
intc2 to intc. New vectors are also added to match the preliminary
information.

Use plat_irq_setup_pins() to select between IRQ and IRL mode for IRQ0-3.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch converts the cpu specific interrupt setup code for sh7785
from intc2 to intc. New vectors are also added to match the information
provided by the datasheet.

No IRQ/IRL pin vectors are enabled by default. Use plat_irq_setup_pins()
to select between IRL and IRQ mode.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch removes old dead code:
- kill off sh73180 cpu support
- get rid of broken solution engine 73180 board support
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that the round_rate() op is supported, hook it up on SH7722
for the FRQCR (CPU, PCLK, etc.) clocks.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch converts the cpu specific 7780 setup code to use the
new intc controller. Many new vectors are added and also support for
external interrupt sense configuration. So with this patch it is now
possible to configure external interrupt pins as edge or level
triggered using set_irq_type().

No external interrupts are registered by default.
Use plat_irq_setup_pins() to select between IRQ or IRL mode.

This patch also fixes the Alarm IRQ for the RTC.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch converts the cpu specific 7722 setup code to use the
new intc controller. Many new vectors are added and also support
for external interrupt sense configuration. So with this patch
it is now possible to configure external interrupt pins as edge
or level triggered using set_irq_type().
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch contains two serial port related fixes for sh7722:
- Make sure the irqs for the first serial port is correct
- Add the second and third serial port to the platform data
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds basic support for UP SH-X3.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.

This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.

One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up the master clock multiplier and initial rate
propagation for the SH7722 clocks.
Signed-off-by: Ndmitry pervushin <dimka@nomadgs.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: NUwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: NRyusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for the SH7722 (MobileR) to the clock framework.
Signed-off-by: Ndmitry pervushin <dimka@nomadgs.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.

This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add the SCIF IRQs to the IPR table for SH7722.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds CPU support for the SH7722.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>