When the guest accesses I/O memory this will create data abort
exceptions and they are handled by decoding the HSR information
(physical address, read/write, length, register) and forwarding reads
and writes to QEMU which performs the device emulation.

Certain classes of load/store operations do not support the syndrome
information provided in the HSR.  We don't support decoding these (patches
are available elsewhere), so we report an error to user space in this case.

This requires changing the general flow somewhat since new calls to run
the VCPU must check if there's a pending MMIO load and perform the write
after userspace has made the data available.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Handles the guest faults in KVM by mapping in corresponding user pages
in the 2nd stage page tables.

We invalidate the instruction cache by MVA whenever we map a page to the
guest (no, we cannot only do it when we have an iabt because the guest
may happily read/write a page before hitting the icache) if the hardware
uses VIPT or PIPT.  In the latter case, we can invalidate only that
physical page.  In the first case, all bets are off and we simply must
invalidate the whole affair.  Not that VIVT icaches are tagged with
vmids, and we are out of the woods on that one.  Alexander Graf was nice
enough to remind us of this massive pain.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

We use space #18 for floating point regs.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

The Cache Size Selection Register (CSSELR) selects the current Cache
Size ID Register (CCSIDR).  You write which cache you are interested
in to CSSELR, and read the information out of CCSIDR.

Which cache numbers are valid is known by reading the Cache Level ID
Register (CLIDR).

To export this state to userspace, we add a KVM_REG_ARM_DEMUX
numberspace (17), which uses 8 bits to represent which register is
being demultiplexed (0 for CCSIDR), and the lower 8 bits to represent
this demultiplexing (in our case, the CSSELR value, which is 4 bits).
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

The following three ioctls are implemented:
 -  KVM_GET_REG_LIST
 -  KVM_GET_ONE_REG
 -  KVM_SET_ONE_REG

Now we have a table for all the cp15 registers, we can drive a generic
API.

The register IDs carry the following encoding:

ARM registers are mapped using the lower 32 bits.  The upper 16 of that
is the register group type, or coprocessor number:

ARM 32-bit CP15 registers have the following id bit patterns:
  0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>

ARM 64-bit CP15 registers have the following id bit patterns:
  0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>

For futureproofing, we need to tell QEMU about the CP15 registers the
host lets the guest access.

It will need this information to restore a current guest on a future
CPU or perhaps a future KVM which allow some of these to be changed.

We use a separate table for these, as they're only for the userspace API.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Adds a new important function in the main KVM/ARM code called
handle_exit() which is called from kvm_arch_vcpu_ioctl_run() on returns
from guest execution. This function examines the Hyp-Syndrome-Register
(HSR), which contains information telling KVM what caused the exit from
the guest.

Some of the reasons for an exit are CP15 accesses, which are
not allowed from the guest and this commit handles these exits by
emulating the intended operation in software and skipping the guest
instruction.

Minor notes about the coproc register reset:
1) We reserve a value of 0 as an invalid cp15 offset, to catch bugs in our
   table, at cost of 4 bytes per vcpu.

2) Added comments on the table indicating how we handle each register, for
   simplicity of understanding.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Provides complete world-switch implementation to switch to other guests
running in non-secure modes. Includes Hyp exception handlers that
capture necessary exception information and stores the information on
the VCPU and KVM structures.

The following Hyp-ABI is also documented in the code:

Hyp-ABI: Calling HYP-mode functions from host (in SVC mode):
   Switching to Hyp mode is done through a simple HVC #0 instruction. The
   exception vector code will check that the HVC comes from VMID==0 and if
   so will push the necessary state (SPSR, lr_usr) on the Hyp stack.
   - r0 contains a pointer to a HYP function
   - r1, r2, and r3 contain arguments to the above function.
   - The HYP function will be called with its arguments in r0, r1 and r2.
   On HYP function return, we return directly to SVC.

A call to a function executing in Hyp mode is performed like the following:

        <svc code>
        ldr     r0, =BSYM(my_hyp_fn)
        ldr     r1, =my_param
        hvc #0  ; Call my_hyp_fn(my_param) from HYP mode
        <svc code>

Otherwise, the world-switch is pretty straight-forward. All state that
can be modified by the guest is first backed up on the Hyp stack and the
VCPU values is loaded onto the hardware. State, which is not loaded, but
theoretically modifiable by the guest is protected through the
virtualiation features to generate a trap and cause software emulation.
Upon guest returns, all state is restored from hardware onto the VCPU
struct and the original state is restored from the Hyp-stack onto the
hardware.

SMP support using the VMPIDR calculated on the basis of the host MPIDR
and overriding the low bits with KVM vcpu_id contributed by Marc Zyngier.

Reuse of VMIDs has been implemented by Antonios Motakis and adapated from
a separate patch into the appropriate patches introducing the
functionality. Note that the VMIDs are stored per VM as required by the ARM
architecture reference manual.

To support VFP/NEON we trap those instructions using the HPCTR. When
we trap, we switch the FPU.  After a guest exit, the VFP state is
returned to the host.  When disabling access to floating point
instructions, we also mask FPEXC_EN in order to avoid the guest
receiving Undefined instruction exceptions before we have a chance to
switch back the floating point state.  We are reusing vfp_hard_struct,
so we depend on VFPv3 being enabled in the host kernel, if not, we still
trap cp10 and cp11 in order to inject an undefined instruction exception
whenever the guest tries to use VFP/NEON. VFP/NEON developed by
Antionios Motakis and Rusty Russell.

Aborts that are permission faults, and not stage-1 page table walk, do
not report the faulting address in the HPFAR.  We have to resolve the
IPA, and store it just like the HPFAR register on the VCPU struct. If
the IPA cannot be resolved, it means another CPU is playing with the
page tables, and we simply restart the guest.  This quirk was fixed by
Marc Zyngier.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NAntonios Motakis <a.motakis@virtualopensystems.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

All interrupt injection is now based on the VM ioctl KVM_IRQ_LINE.  This
works semantically well for the GIC as we in fact raise/lower a line on
a machine component (the gic).  The IOCTL uses the follwing struct.

struct kvm_irq_level {
	union {
		__u32 irq;     /* GSI */
		__s32 status;  /* not used for KVM_IRQ_LEVEL */
	};
	__u32 level;           /* 0 or 1 */
};

ARM can signal an interrupt either at the CPU level, or at the in-kernel irqchip
(GIC), and for in-kernel irqchip can tell the GIC to use PPIs designated for
specific cpus.  The irq field is interpreted like this:

  bits:  | 31 ... 24 | 23  ... 16 | 15    ...    0 |
  field: | irq_type  | vcpu_index |   irq_number   |

The irq_type field has the following values:
- irq_type[0]: out-of-kernel GIC: irq_number 0 is IRQ, irq_number 1 is FIQ
- irq_type[1]: in-kernel GIC: SPI, irq_number between 32 and 1019 (incl.)
               (the vcpu_index field is ignored)
- irq_type[2]: in-kernel GIC: PPI, irq_number between 16 and 31 (incl.)

The irq_number thus corresponds to the irq ID in as in the GICv2 specs.

This is documented in Documentation/kvm/api.txt.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

This commit introduces the framework for guest memory management
through the use of 2nd stage translation. Each VM has a pointer
to a level-1 table (the pgd field in struct kvm_arch) which is
used for the 2nd stage translations. Entries are added when handling
guest faults (later patch) and the table itself can be allocated and
freed through the following functions implemented in
arch/arm/kvm/arm_mmu.c:
 - kvm_alloc_stage2_pgd(struct kvm *kvm);
 - kvm_free_stage2_pgd(struct kvm *kvm);

Each entry in TLBs and caches are tagged with a VMID identifier in
addition to ASIDs. The VMIDs are assigned consecutively to VMs in the
order that VMs are executed, and caches and tlbs are invalidated when
the VMID space has been used to allow for more than 255 simultaenously
running guests.

The 2nd stage pgd is allocated in kvm_arch_init_vm(). The table is
freed in kvm_arch_destroy_vm(). Both functions are called from the main
KVM code.

We pre-allocate page table memory to be able to synchronize using a
spinlock and be called under rcu_read_lock from the MMU notifiers.  We
steal the mmu_memory_cache implementation from x86 and adapt for our
specific usage.

We support MMU notifiers (thanks to Marc Zyngier) through
kvm_unmap_hva and kvm_set_spte_hva.

Finally, define kvm_phys_addr_ioremap() to map a device at a guest IPA,
which is used by VGIC support to map the virtual CPU interface registers
to the guest. This support is added by Marc Zyngier.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Sets up KVM code to handle all exceptions taken to Hyp mode.

When the kernel is booted in Hyp mode, calling an hvc instruction with r0
pointing to the new vectors, the HVBAR is changed to the the vector pointers.
This allows subsystems (like KVM here) to execute code in Hyp-mode with the
MMU disabled.

We initialize other Hyp-mode registers and enables the MMU for Hyp-mode from
the id-mapped hyp initialization code. Afterwards, the HVBAR is changed to
point to KVM Hyp vectors used to catch guest faults and to switch to Hyp mode
to perform a world-switch into a KVM guest.

Also provides memory mapping code to map required code pages, data structures,
and I/O regions  accessed in Hyp mode at the same virtual address as the host
kernel virtual addresses, but which conforms to the architectural requirements
for translations in Hyp mode. This interface is added in arch/arm/kvm/arm_mmu.c
and comprises:
 - create_hyp_mappings(from, to);
 - create_hyp_io_mappings(from, to, phys_addr);
 - free_hyp_pmds();
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Targets KVM support for Cortex A-15 processors.

Contains all the framework components, make files, header files, some
tracing functionality, and basic user space API.

Only supported core is Cortex-A15 for now.

Most functionality is in arch/arm/kvm/* or arch/arm/include/asm/kvm_*.h.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

Add a method (hyp_idmap_setup) to populate a hyp pgd with an
identity mapping of the code contained in the .hyp.idmap.text
section.

Offer a method to drop this identity mapping through
hyp_idmap_teardown.

Make all the above depend on CONFIG_ARM_VIRT_EXT and CONFIG_ARM_LPAE.
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>

KVM uses the stage-2 page tables and the Hyp page table format,
so we define the fields and page protection flags needed by KVM.

The nomenclature is this:
 - page_hyp:        PL2 code/data mappings
 - page_hyp_device: PL2 device mappings (vgic access)
 - page_s2:         Stage-2 code/data page mappings
 - page_s2_device:  Stage-2 device mappings (vgic access)
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com>
Christoffer Dall <c.dall@virtualopensystems.com>

Currently __hw_perf_event_init has an err variable that's ignored right
until the end, where it's initialised, conditionally set, and then used
as a boolean flag deciding whether to return another error code.

This patch removes the err variable and simplifies the associated error
handling logic.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

We currently check for hwx->idx < 0 in armpmu_read and armpmu_del
unnecessarily. The only case where hwc->idx < 0 is when armpmu_add
fails, in which case the event's state is set to
PERF_EVENT_STATE_INACTIVE.

The perf core will not attempt to read from an event in
PERF_EVENT_STATE_INACTIVE, and so the check in armpmu_read is
unnecessary. Similarly, if perf core cannot add an event it will not
attempt to delete it, so the WARN_ON in armpmu_del is unnecessary.

This patch removes these two redundant checks.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Currently perf_pmu_register may fail for several reasons (e.g. being
unable to allocate memory for the struct device it associates with each
PMU), and while any error is propagated by armpmu_register, it is
ignored by cpu_pmu_device_probe and not propagated to the caller.  This
also results in a leak of a struct arm_pmu.

This patch adds cleanup if armpmu_register fails, and updates the info
messages to better differentiate this type of failure from a failure to
probe the PMU type from the hardware or dt.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

ARM has a harvard cache architecture and cannot write directly to the
I-side.

This patch removes the L1I write events from the cache map (which
previously returned *read* events in many cases).
Reported-by: NMike Williams <michael.williams@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

cpu_pmu has already been dereferenced before we consider invoking the
->reset function, so remove the redundant NULL check.
Reported-by: NCong Ding <dinggnu@gmail.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Instead of decoding implementor numbers, part numbers and Xscale
architecture masks inline in the pmu probing function, use defines
and accessor functions from cputype.h, which can also be shared by
other subsystems, such as KVM.
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Define implementor IDs, part numbers and Xscale architecture versions in
cputype.h.  Also create accessor functions for reading the implementor,
part number, and Xscale architecture versions from the CPUID regiser.
Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Pull ARM fixes from Russell King.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
  ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable
  ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
  ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM
  ARM: 7611/1: VIC: fix bug in VIC irqdomain code
  ARM: 7610/1: versatile: bump IRQ numbers
  ARM: 7609/1: disable errata work-arounds which access secure registers
  ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier

Pull EDAC fixes from Borislav Petkov:
 "Two error path fixes causing a crash and a Kconfig fix for an issue
  which spilled all EDAC suboptions into the 'Device Drivers' menu."

* tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC: Cleanup device deregistering path
  EDAC: Fix EDAC Kconfig menu
  EDAC: Fix kernel panic on module unloading

The check for a pmd being in the process of being split was dropped by
mistake by commit d10e63f2 ("mm: numa: Create basic numa page
hinting infrastructure"). Put it back.
Reported-by: NDave Jones <davej@redhat.com>
Debugged-by: NHillf Danton <dhillf@gmail.com>
Acked-by: NAndrea Arcangeli <aarcange@redhat.com>
Acked-by: NMel Gorman <mgorman@suse.de>
Cc: Kirill Shutemov <kirill@shutemov.name>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Commit 3a50597d ("KEYS: Make the session and process keyrings
per-thread") removed the definition of the thread_group_cred structure,
but left a now unused pointer in struct cred.
Signed-off-by: NMarc Dionne <marc.c.dionne@gmail.com>
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Pull ARM SoC fixes from Olof Johansson:
 "People are back from the holiday breaks, and it shows.  Here are a
  bunch of fixes for a number of platforms:
   - A couple of small fixes for Nomadik
   - A larger set of changes for kirkwood/mvebu
     - uart driver selection, dt clocks, gpio-poweroff fixups, a few
       __init annotation fixes and some error handling improvement in
       their xor dma driver.
   - i.MX had a couple of minor fixes (and a critical one for flexcan2
     clock setup)
   - MXS has a small board fix and a framebuffer bugfix
   - A set of fixes for Samsung Exynos, fixing default bootargs and some
     Exynos5440 clock issues
   - A set of OMAP changes including PM fixes and a few sparse warning
     fixups

  All in all a bit more positive code delta than we'd ideally want to
  see here, mostly from the OMAP PM changes, but nothing overly crazy."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
  ARM: clps711x: Fix bad merge of clockevents setup
  ARM: highbank: save and restore L2 cache and GIC on suspend
  ARM: highbank: add a power request clear
  ARM: highbank: fix secondary boot and hotplug
  ARM: highbank: fix typos with hignbank in power request functions
  ARM: dts: fix highbank cpu mpidr values
  ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  ...

Pull drm update from Dave Airlie:
 "Exynos and Radeon mostly, with a dma-buf and ttm fix thrown in.

  It's a bit big but its mostly exynos license fix ups and I'd rather
  not hold those up since its legally stuff.

  Radeon has a couple of fixes from dma engine work, TTM is just a
  locking fix, and dma-buf fix has been hanging around and I finally got
  a chance to review it."

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (30 commits)
  drm/ttm: fix fence locking in ttm_buffer_object_transfer
  drm/prime: drop reference on imported dma-buf come from gem
  drm/radeon: add quirk for d3 delay during switcheroo poweron for apple macbooks
  drm/exynos: move finish page flip to a common place
  drm/exynos: fimd: modify condition in fimd resume
  drm/radeon: fix DMA CS parser for r6xx linear copy packet
  drm/radeon: split r6xx and r7xx copy_dma functions
  drm/exynos: Use devm_clk_get in exynos_drm_gsc.c
  drm/exynos: Remove redundant NULL check in exynos_drm_gsc.c
  drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_gsc.c
  drm/exynos: Use devm_clk_get in exynos_drm_rotator.c
  drm/exynos: Remove redundant NULL check in exynos_drm_rotator.c
  drm/exynos: Remove unnecessary devm_* freeing APIs in exynos_drm_rotator.c
  drm/exynos: Use devm_clk_get in exynos_drm_fimc.c
  drm/exynos: Remove redundant NULL check
  drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_fimc.c
  drm/exynos: Use devm_kzalloc in exynos_drm_ipp.c
  drm/exynos: fix gem buffer allocation type checking
  drm/exynos: remove needless parenthesis.
  drm/exynos: fix incorrect interrupt induced by m2m operation.
  ...

Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren:
The biggest change is a fix to deal with different power state
on omap2 registers that causes issues trying to use common PM code.
Also fix few incorrect registers, and an issue for omap1 USB, and
few sparse fixes for issues that sneaked in with all the clean-up.

* tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  ARM: OMAP1: fix USB configuration use-after-release
  ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
  ARM: OMAP3: clock data: Add missing enable/disable for EMU clock
  ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources
  ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets
  ARM: OMAP4: PRM: Correct reset source map
  ARM: OMAP: SRAM: resolve sparse warnings
  ARM: OMAP AM33xx: hwmod data: resolve sparse warnings
  ARM: OMAP: 32k counter: resolve sparse warnings
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge branch 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

From Kukjin Kim:
Most of them are EXYNOS5440 fixes which are for changing uart console,
cpu id (typo)  and silent complaining gpio error in kernel boot.

* 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: skip the clock initialization for exynos5440
  ARM: EXYNOS: enable PINCTRL for EXYNOS5440
  ARM: dts: use uart port1 for console on exynos4210-smdkv310
  ARM: dts: use uart port0 for console on exynos5440-ssdk5440
  ARM: SAMSUNG: fix the cpu id for EXYNOS5440
  ARM: EXYNOS: Revise HDMI resource size

From Shawn Guo:
I have to send one critical mxsfb fix through arm-soc, as FB maintainer
is unresponsive for quite a while.  People start complaining the missing
of such an important fix.

* tag 'mxs-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  video: mxsfb: fix crash when unblanking the display
  ARM: dts: imx23-olinuxino: Fix IOMUX settings

From Shawn Guo:

It includes one critical fix - wrong flexcan2 clock will hang system
when the port gets brought up.  The other two are non-critical fixes,
which are sent together here, since it's still early -rc stage.

* tag 'imx-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: dts: imx31-bug: Fix manufacturer compatible string
  clk: imx: Remove 'clock-output-names' from the examples

Pull sound fixes from Takashi Iwai:
 "Nothing too exciting here, just a few regression and trivial fixes,
  and new quirks for HD-audio and USB-audio.

   - HD-audio mute LED mode enum fix
   - Fix kernel panic of Digidesign Mbox2 usb-audio quirk (which was new
     in 3.8-rc1)
   - Creative BT-D1 usb-audio quirk
   - mute LED fixup for HP Pavillion 17 laptop"

* tag 'sound-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: hda - add mute LED for HP Pavilion 17 (Realtek codec)
  ALSA: au88x0: fix incorrect left shift
  sound: oss/pas2: Fix possible access out of array
  ALSA: usb-audio: Fix kernel panic of Digidesign Mbox2 quirk
  ALSA: usb-audio: Add support for Creative BT-D1 via usb sound quirks
  ALSA: hda - Switch "On" and "Off" for "Mute-LED Mode" kcontrol

Pull networking fixes from David Miller:

 1) New sysctl ndisc_notify needs some documentation, from Hanns
    Frederic Sowa.

 2) Netfilter REJECT target doesn't set transport header of SKB
    correctly, from Mukund Jampala.

 3) Forcedeth driver needs to check for DMA mapping failures, from Larry
    Finger.

 4) brcmsmac driver can't use usleep_range while holding locks, use
    udelay instead.  From Niels Ole Salscheider.

 5) Fix unregister of netlink bridge multicast database handlers, from
    Vlad Yasevich and Rami Rosen.

 6) Fix checksum calculations in netfilter's ipv6 network prefix
    translation module.

 7) Fix high order page allocation failures in netfilter xt_recent, from
    Eric Dumazet.

 8) mac802154 needs to use netif_rx_ni() instead of netif_rx() because
    mac802154_process_data() can execute in process rather than
    interrupt context.  From Alexander Aring.

 9) Fix splice handling of MSG_SENDPAGE_NOTLAST, otherwise we elide one
    tcp_push() too many.  From Eric Dumazet and Willy Tarreau.

10) Fix skb->truesize tracking in XEN netfront driver, from Ian
    Campbell.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (46 commits)
  xen/netfront: improve truesize tracking
  ipv4: fix NULL checking in devinet_ioctl()
  tcp: fix MSG_SENDPAGE_NOTLAST logic
  net/ipv4/ipconfig: really display the BOOTP/DHCP server's address.
  ip-sysctl: fix spelling errors
  mac802154: fix NOHZ local_softirq_pending 08 warning
  ipv6: document ndisc_notify in networking/ip-sysctl.txt
  ath9k: Fix Kconfig for ATH9K_HTC
  netfilter: xt_recent: avoid high order page allocations
  netfilter: fix missing dependencies for the NOTRACK target
  netfilter: ip6t_NPT: fix IPv6 NTP checksum calculation
  bridge: add empty br_mdb_init() and br_mdb_uninit() definitions.
  vxlan: allow live mac address change
  bridge: Correctly unregister MDB rtnetlink handlers
  brcmfmac: fix parsing rsn ie for ap mode.
  brcmsmac: add copyright information for Canonical
  rtlwifi: rtl8723ae: Fix warning for unchecked pci_map_single() call
  rtlwifi: rtl8192se: Fix warning for unchecked pci_map_single() call
  rtlwifi: rtl8192de: Fix warning for unchecked pci_map_single() call
  rtlwifi: rtl8192ce: Fix warning for unchecked pci_map_single() call
  ...

Noticed while reviewing the fence locking in the radeon pageflip
handler.

v2: Instead of grabbing the bdev->fence_lock in object_transfer just
move the single callsite of that function a few lines, so that it is
protected by the fence_lock. Suggested by Jerome Glisse.

v3: Fix typo in commit message.
Reviewed-by: NJerome Glisse <jglisse@redhat.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NDave Airlie <airlied@redhat.com>

From Jason Cooper:

fixes for mvebu/kirkwood v3.8
 - use correct uart driver for mvebu boards
 - add a missing DT clocks
 - gpio-poweroff level vs. edge triggering, use gpio_is_valid()
 - remove an inappropriate __init, modules need to access function.
 - various DT fixes
 - error handling in mv_xor

* tag 'mvebu_fixes_for_v3.8' of git://git.infradead.org/users/jcooper/linux:
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  Power: gpio-poweroff: Fix documentation and gpio_is_valid
  ARM: Kirkwood: Fix missing clk for USB device.
  arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
Signed-off-by: NOlof Johansson <olof@lixom.net>

I mismerged a previous branch from Alexander, and accidentally left
in ARCH_USES_GETTIMEOFFSET. Remove it.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Cc: Alexander Shiyan <shc_work@mail.ru>

Merge tag 'nomadik-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into fixes

From Linus Walleij:
Two fixes to the Nomadik:
- Delete a dangling include
- Bump IRQ numbers to offset at 32

* tag 'nomadik-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: bump the IRQ numbers again
  ARM: nomadik: delete dangling include

This fixes suspend to RAM adding necessary save and restore of L2 and GIC.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

When we fail to power down, we need to clear out the power request.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>