- 23 12月, 2015 24 次提交
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由 Cyrille Pitchen 提交于
This feature should not be enabled in release but can be usefull for developers who need to monitor register accesses at some specific places. Set the AES_FLAGS_DUMP_REG flag inside dd->flags to start monitoring the I/O accesses, clear it to stop monitoring. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch adds support to the GCM mode. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Increase the DMA threshold to 256: PIO accesses offer better performances than the DMA when processing small amounts of data. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Depending on its hardware version, the AES IP provides either a 16 or a 32 bit counter. However the CTR mode expects the size of the counter to be the same as the size of the cipher block, ie 128 bits for AES. This patch detects and handles counter overflows. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
crypto_rfc3686_alloc() in crypto/ctr.c expects to be used with a stream cipher (alg->cra_blocksize == 1). Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch only creates sections to regroup functions by usage. This will help to integrate the GCM support patch later by making the difference between shared/common and specific code. Hence current sections are: - Shared functions: common code which will be reused by the GCM support. - CPU transfer: handles transfers monitored by the CPU (PIO accesses). - DMA transfer: handles transfers monitored by the DMA controller. - AES async block ciphers: dedicated to the already supported block ciphers - Probe functions: used to register all crypto algorithms. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Dummy patch to fix typo and indentation. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This is a dummy cosmetic patch. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch totally reworks data transfer. 1 - DMA The new code now fully supports scatter-gather lists hence reducing the number of interrupts in some cases. Also buffer alignments are better managed to avoid useless copies. 2 - CPU The new code allows to use PIO accesses even when transferring more than one AES block, so futher patches could tune the DMA threshold (ATMEL_AES_DMA_THRESHOLD). Moreover, CPU transfers now have a chance to be processed synchronously, hence reducing the latency by avoiding context switches when possible (less interrupts to process, less scheduling of the 'done' task). Indeed the 'DATA READY' bit is polled only one time in the Interrupt Status Register before enabling then waiting for the associated interrupt. In some condition, this single poll is enough as the data have already been processed by the AES hardware and so are ready. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Add missing call to atmel_aes_buff_cleanup(). Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Since the 'done' task code was split into atmel_aes_cpu_complete() and atmel_aes_dma_complete(), the AES_FLAGS_DMA flag has become useless. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
atmel_aes_dma_callback() now directly calls the 'resume' callback instead of scheduling the done task, which in turn only calls the very same 'resume' callback. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This 'err' member was initialized to 0 but its value never changed. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch introduces a new callback 'resume' in the struct atmel_aes_dev. This callback is run to resume/complete the processing of the crypto request when woken up by I/O events such as AES interrupts or DMA completion. This callback will help implementing the GCM mode support in further patches. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch reworks the AES_FLAGS_* to simplify the configuration of the AES IP. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
As claimed by the datasheet, writing 0 into the Control Register has no effet. So we remove this useless register access. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch changes atmel_aes_handle_queue() to make it more generic. The function argument is now a pointer to struct crypto_async_request, which is the common base of struct ablkcipher_request and struct aead_request. Also this patch introduces struct atmel_aes_base_ctx which will be the common base of all the transformation contexts. Hence the very same queue will be used to manage both block cipher and AEAD requests (such as gcm and authenc implemented in further patches). Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This patch changes the signature of atmel_aes_write_ctrl() to make it more generic. This will be used by future patches when implementing new block cipher modes such as GCM. Especially atmel_aes_hw_init() is now called outside atmel_aes_write_ctrl(): this allows to call atmel_aes_write_ctrl() many times, still initializing the hardware only once. Indeed, the support of GCM will require to update the Mode Register and the IV when processing a single request. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Before this patch atmel_aes_hw_version_init() had no returned value. However it calls atmel_aes_hw_init(), which may fail. So check the returned code of atmel_aes_hw_init() and propagate error if needed. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Hash headers have nothing to do with AES block ciphers. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
This dummy patch fixes atmel_aes_unregister_algs() so crypto algorithms are unregistered in the reverse order they were registered by atmel_aes_register_algs(). Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
Increase the algorithm priorities so the hardware acceleration is now preferred to the software computation: the "aes-generice" driver uses 100 as priority. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Cyrille Pitchen 提交于
atmel_aes_write_n() should not modify its value argument. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Leilei Zhao 提交于
Add new version of atmel-aes available with SAMA5D2 devices. Signed-off-by: NLeilei Zhao <leilei.zhao@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 22 12月, 2015 8 次提交
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由 Geliang Tang 提交于
Use list_for_each_entry*() instead of list_for_each*() to simplify the code. Signed-off-by: NGeliang Tang <geliangtang@163.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Tested-by: NTom Lendacky <thomas.lendacky@amd.com> Acked-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
Some crypto drivers cannot process empty data message and return a precalculated hash for md5/sha1/sha224/sha256. This patch add thoses precalculated hash in include/crypto. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pingchao Yang 提交于
Change the timeout condition since the times value would be -1 after running MAX_RETRY_TIMES. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NYang Pingchao <pingchao.yang@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pingchao Yang 提交于
AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be left shifted 0x8. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NYang Pingchao <pingchao.yang@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Andrzej Zaborowski 提交于
Avoid the s390 compile "warning: 'pkcs1pad_encrypt_sign_complete' uses dynamic stack allocation" reported by kbuild test robot. Don't use a flat zero-filled buffer, instead zero the contents of the SGL. Signed-off-by: NAndrew Zaborowski <andrew.zaborowski@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 17 12月, 2015 3 次提交
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由 Rahul Pathak 提交于
Removed unused variable "err" and directly return "0" Reported by coccicheck - ./drivers/crypto/omap-aes.c:542:5-8: Unneeded variable: "err". Return "0" on line 551 ./drivers/crypto/omap-des.c:530:5-8: Unneeded variable: "err". Return "0" on line 539 Signed-off-by: NRahul Pathak <rpathak@visteon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Rahul Pathak 提交于
Removed unused variable "err" and directly return "0" Reported by coccicheck - ./drivers/crypto/atmel-sha.c:758:5-8: Unneeded variable: "err". Return "0" on line 766 Signed-off-by: NRahul Pathak <rpathak@visteon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Haren Myneni 提交于
NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is nothing to do with NX request. Since this bit can be set with other valuable return status, mast this bit. One of other bits (INITIATED, BUSY or REJECTED) will be returned for any given NX request. Signed-off-by: NHaren Myneni <haren@us.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 14 12月, 2015 3 次提交
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由 Tadeusz Struk 提交于
accel_id has to be large enough to hold ADF_MAX_DEVICES + 1 (which is > 1025) so uint8_t is too small. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sam Protsenko 提交于
When using DES module the next bug appears: BUG: scheduling while atomic: kworker/0:1/63/0x00000102 With backtrace as follows: <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< cut here >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> [<c0012294>] (dump_backtrace) from [<c00124ac>] (show_stack+0x18/0x1c) [<c0012494>] (show_stack) from [<c0752554>] (dump_stack+0x84/0xc4) [<c07524d0>] (dump_stack) from [<c0750218>] (__schedule_bug+0x54/0x64) [<c07501c4>] (__schedule_bug) from [<c07548a4>] (__schedule+0x4ac/0x53c) [<c07543f8>] (__schedule) from [<c075496c>] (schedule+0x38/0x88) [<c0754934>] (schedule) from [<c03c3984>] (rpm_resume+0x158/0x59c) [<c03c382c>] (rpm_resume) from [<c03c3e1c>] (__pm_runtime_resume+0x54/0x6c) [<c03c3dc8>] (__pm_runtime_resume) from [<c0568ff8>] (omap_des_handle_queue+0x154/0x7bc) [<c0568ea4>] (omap_des_handle_queue) from [<c05696b8>] (omap_des_crypt+0x58/0xbc) [<c0569660>] (omap_des_crypt) from [<c0569730>] (omap_des_cbc_decrypt+0x14/0x18) [<c056971c>] (omap_des_cbc_decrypt) from [<c0297534>] (authenc_verify_ahash_done+0xe0/0xe8) [<c0297454>] (authenc_verify_ahash_done) from [<c056a330>] (omap_sham_finish_req+0x58/0xa8) [<c056a2d8>] (omap_sham_finish_req) from [<c056b714>] (omap_sham_done_task+0x1c0/0x1e0) [<c056b554>] (omap_sham_done_task) from [<c003e53c>] (tasklet_action+0x80/0x118) [<c003e4bc>] (tasklet_action) from [<c003e740>] (__do_softirq+0x11c/0x260) [<c003e624>] (__do_softirq) from [<c003eb64>] (irq_exit+0xc0/0xfc) [<c003eaa4>] (irq_exit) from [<c000f1c4>] (handle_IRQ+0x4c/0x98) [<c000f178>] (handle_IRQ) from [<c0008568>] (gic_handle_irq+0x34/0x64) [<c0008534>] (gic_handle_irq) from [<c0758540>] (__irq_svc+0x40/0x70) <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< cut here >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> Insight was seen in drivers/crypto/omap-sham.c driver. All credits for this patch go to Grygorii Strashko. Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Zeng Xin 提交于
The VF bundle interrupt is not triggered any more in the case when guest is shut down with sample app running. Need to clear the flag interrupt bit when restarting to fix this irrecoverable state. Signed-off-by: NZeng Xin <xin.zeng@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 11 12月, 2015 2 次提交
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由 Paul Gortmaker 提交于
This file does not contain any modular related function calls. So get rid of module.h since it drags in a lot of other headers and adds to the preprocessing load. It does export some symbols though, so we'll need to ensure it has export.h present instead. Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-crypto@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tadeusz Struk 提交于
Fix i386-randconfig-x004-12092241. PCI_IOV needs to be selected when VFs are enabled Reported-by: <fengguang.wu@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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