1. 12 7月, 2012 1 次提交
  2. 04 12月, 2011 1 次提交
  3. 05 5月, 2011 1 次提交
    • C
      arch/tile: various header improvements for building drivers · 28d71741
      Chris Metcalf 提交于
      This change adds a number of missing headers in asm (fb.h, parport.h,
      serial.h, and vga.h) using the minimal generic versions.
      
      It also adds a number of missing interfaces that showed up as build
      failures when trying to build various drivers not normally included in the
      "tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(),
      virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(),
      and __pmd().  I also added a cast in virt_to_page() since not all callers
      pass a pointer.
      
      I fixed <asm/stat.h> to properly include a __KERNEL__ guard for the
      __ARCH_WANT_STAT64 symbol, and <asm/swab.h> to use __builtin_bswap32()
      even for our 64-bit architecture, since the same code is produced.
      
      I added an export for get_cycles(), since it's used in some modules.
      
      And I made <arch/spr_def.h> properly include the __KERNEL__ guard,
      even though it's not yet exported, since it likely will be soon.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      28d71741
  4. 25 11月, 2010 1 次提交
    • C
      pci root complex: support for tile architecture · f02cbbe6
      Chris Metcalf 提交于
      This change enables PCI root complex support for TILEPro.  Unlike
      TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI
      support consists of hypervisor upcalls for PIO, DMA, etc.  However,
      the performance is fine for the devices we have tested with so far
      (1Gb Ethernet, SATA, etc.).
      
      The <asm/io.h> header was tweaked to be a little bit more aggressive
      about disabling attempts to map/unmap IO port space.  The hacky
      <asm/pci-bridge.h> header was rolled into the <asm/pci.h> header
      and the result was simplified.  Both of the latter two headers were
      preliminary versions not meant for release before now - oh well.
      
      There is one quirk for our TILEmpower platform, which accidentally
      negotiates up to 5GT and needs to be kicked down to 2.5GT.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      f02cbbe6
  5. 15 9月, 2010 1 次提交
  6. 05 6月, 2010 1 次提交