- 26 3月, 2014 2 次提交
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由 Gabriel FERNANDEZ 提交于
The patch supports the VCC-mux and MUX clocks used by ClockGenC/F VCC-mux clock : Divider-Multiplexer-Gate inside ClockGenC/F It includes support for each channel : 4-parent Multiplexer, Post Divide by 1, 2, 4 or 8, Gate to switch OFF the output channel. The clock is implemented using generic clocks implemented in the kernel clk_divider, clk_mux, clk_gate and clk_composite (to combine all) MUX clock : 2-parent clock used inside ClockGenC/F. The clock is implemented using generic clocks implemented in the kernel clk_mux. Signed-off-by: NPankaj Dev <pankaj.dev@st.com> Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Gabriel FERNANDEZ 提交于
The patch supports the DIVMUX and PreDiv clocks used by ClockGenA(s) DIVMUX clock : Divider-Multiplexer-Gate inside ClockGenA(s) It includes support for each channel : 3-parent Multiplexer, Divider for each Parent, Gate to switch OFF the output channel. The clock is implemented using generic clocks implemented in the kernel clk_divider and clk_mux. PreDiv clock : Fixed Divider Clock used inside ClockGenA(s) to divide the oscillator clock by factor-of-16. The clock is implemented using generic clocks implemented in the kernel clk_divider. Signed-off-by: NPankaj Dev <pankaj.dev@st.com> Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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