- 04 5月, 2015 1 次提交
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由 Tony Lindgren 提交于
If we use a combination of VMODE and I2C4 for retention modes, eventually the off idle power consumption will creep up by about 23mW, even during off mode with I2C4 always staying enabled. Turns out this is because of erratum i531 "Extra Power Consumed When Repeated Start Operation Mode Is Enabled on I2C Interface Dedicated for Smart Reflex (I2C4)" as pointed out by Nishanth Menon <nm@ti.com>. Let's fix the issue by adding i2c_cfg_clear_mask for the bits to clear when initializing the I2C4 adapter so we can clear SREN bit that drives the I2C4 lines low otherwise when there is no traffic. Fixes: 3b8c4ebb ("ARM: OMAP3: Fix idle mode signaling for Cc: stable@vger.kernel.org # v3.16+ sys_clkreq and sys_off_mode") Cc: Kevin Hilman <khilman@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Reviewed-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 9月, 2014 1 次提交
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由 Joe Perches 提交于
Use the more common pr_warn. Other miscellanea: o Realign arguments Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 5月, 2014 1 次提交
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由 Victor Kamensky 提交于
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 5月, 2014 3 次提交
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由 Tony Lindgren 提交于
Currently we're attempting to use a static value for the voltctrl register that only works for controlling the PMIC over I2C4. For using sys_off_mode signaling, we need to update update clksetup, voltsetup1, voltsetup2 and voltctrl registers dynamically depending on the idle state. So let's fix this by configuring things for I2C4 controlled idle and sys_off_mode pin controlled idle, and then write the configured register values depending on the idle state. This is similar what N900 kernel is doing too. Cc: Kevin Hilman <khilman@linaro.org> Cc: Nishanth Menon <nm@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit c589eb38 (ARM: OMAP3: VC: calculate ramp times) started using regulator slew rates for calculating the idle mode start-up times. This works fine for I2C4 controlled regulator scaling as the regulators are never completely turned off. For sys_off_mode pin controlled PMIC scripts, the slew rate based calculations won't work at all as the regulators are completely turned off and the start-up time is much longer. This means currently omap3_set_off_timings currently has zero chance of working on any real hardare. The current code is broken in at least the following ways: 1. It attempts to use the default ULONG_MAX value for the oscillator start-up value as we're currently never initializing the start-up value. 2. It relies on a magic number potentially set by the bootloader for volsetup2 register. 3. If no magic value is passed, it attempts to calculate voltsetup2 register based on the regulator slew rate. This won't work as there is roughly at least five times the delay needed for turning on vdd1 and vdd2 regulators. 4. It does duplicate register write to OMAP3_PRM_VOLTOFFSET 5. It duplicates the code for omap_usec_to_32k unnecessarily 6. It initialized global registers twice, once for each channel Let's just remove the broken code and call omap3_set_i2c_timings directly, we're better off with this function doing nothing until it's fixed. And otherwise further fixes to omap3_set_off_timings will be unreadable. And let's get rid of omap3_set_clksetup as that's not needed for off-idle controlled by I2C4 as in that case the oscillator is never shut down. Cc: Kevin Hilman <khilman@linaro.org> Cc: Nishanth Menon <nm@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
While debugging legacy mode vs device tree booted PM regressions, I noticed that omap3 is not toggling sys_clkreq and sys_off_mode pins like it should. The sys_clkreq and sys_off_mode pins are not toggling because of the following issues: 1. The default polarity for the sys_off_mode pin is wrong. OFFMODE_POL needs to be cleared for sys_off_mode to go down when hitting off-idle, while CLKREQ_POL needs to be set so sys_clkreq goes down when hitting retention. 2. The values for voltctrl register need to be updated dynamically. We need to set either the retention idle bits, or off idle bits in the voltctrl register depending the idle mode we're targeting to hit. Let's fix these two issues as otherwise the system will just hang if any twl4030 PMIC idle scripts are loaded. The only case where the system does not hang is if only retention idle over I2C4 is configured by the bootloader. Note that even without the twl4030 PMIC scripts, these fixes will do the proper signaling of sys_clkreq and sys_off_mode pins, so the fixes are needed to fix monitoring of PM states with LEDs or an oscilloscope. Cc: Kevin Hilman <khilman@linaro.org> Cc: Nishanth Menon <nm@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 11月, 2012 1 次提交
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由 Kevin Hilman 提交于
commit 908b75e8 (ARM: OMAP: add support for oscillator setup) added a new API for oscillator setup, but is broken when CONFIG_PM=n. The new functions have dummy definitions when CONFIG_PM=n, but also have full implementations available, which conflict. To fix, wrap the PM implmentations in #ifdef CONFIG_PM. Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 11月, 2012 6 次提交
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由 Tero Kristo 提交于
VC code now provides a table of pre-calculated I2C setup parameters, which will be used based on the capacitance value calculated for the I2C trace on the PCB. A default trace length of 6.3cm is used unless board defines its own value during init. The parameters set will be the I2C internal pull setup and the I2C timing parameters for high speed use mode. Full speed mode is not supported as of now. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Tero Kristo 提交于
RACEN bit should only be set if the voltage and command register addresses are the same. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Tero Kristo 提交于
We now use the previously defined oscillator setup / shutdown times to calculate the register values for CLKSETUP. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Tero Kristo 提交于
OMAP4 VC code now uses voltage deltas + slew rates for calculating actual ramp times for voltage changes. Both retention / sleep + off mode voltage ramp times are setup at the same time during initialization. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Tero Kristo 提交于
OMAP3 VC code now uses voltage deltas + slew rates for calculating actual ramp times for voltage changes. Previously a static value was used. Two calculation methods are provided: i2c_timings and off_timings. I2C timings are used during retention or off mode transition which is initiated over I2C, and OFF timings are used if PMIC signal (nsleep) is used to control all the off mode voltages at the same time. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Tero Kristo 提交于
These new structs will hold the sleep voltage levels (omap_vc_params) and voltage processor min / max voltages (omap_vp_params.) Previously these were part of the PMIC struct, but they do not really belong there, as they are OMAP chip specific, not PMIC specific parameters. voltdm code is also changed to use the new structs. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 26 10月, 2012 1 次提交
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由 Kevin Hilman 提交于
Add missing newline to warning message to avoid annoying wrapping problems during kernel boot like this one: omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0). omap_vc_i2c_init: I2C config for vdd_mpu does not match other channels (0).Power Management for TI OMAP4. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 13 9月, 2012 1 次提交
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由 Tony Lindgren 提交于
As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Acked-by: NWim Van Sebroeck <wim@iguana.be> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 9月, 2012 1 次提交
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由 Paul Walmsley 提交于
Find and unwrap wrapped strings in the style: pr_debug("clockdomain: hardware cannot set/clear wake up of " "%s when %s wakes up\n", clkdm1->name, clkdm2->name); Keeping these strings contiguous seems to be the current Linux kernel policy. The offending lines were found with the following command: pcregrep -rnM '"\s*$\s*"' arch/arm/*omap* While here, some messages have been clarified, some pr_warning( ... calls have been converted to pr_warn( ..., and some printk(KERN_* ... have been converted to pr_*. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 3月, 2012 1 次提交
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由 Tony Lindgren 提交于
Found few more with randconfig generated .configs: In file included from arch/arm/mach-omap2/prm-regbits-34xx.h:17, from arch/arm/mach-omap2/vc.c:18: arch/arm/mach-omap2/prm2xxx_3xxx.h: In function ‘omap2_prm_read_mod_reg’: arch/arm/mach-omap2/prm2xxx_3xxx.h:239: error: implicit declaration of function ‘WARN’ In file included from arch/arm/mach-omap2/powerdomain44xx.c:22: arch/arm/mach-omap2/prm2xxx_3xxx.h: In function ‘omap2_prm_read_mod_reg’: arch/arm/mach-omap2/prm2xxx_3xxx.h:239: error: implicit declaration of function ‘WARN’ This is because omap2_prm functions are currently just stubs for omap4 only builds. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 2月, 2012 2 次提交
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由 Russell King 提交于
On my OMAP4 platform, I'm getting this error message repeated several times at boot: omap_vc_i2c_init: I2C config for all channels must match. omap_vc_i2c_init: I2C config for all channels must match. This doesn't help identify what the problem is. Fix this message to be more informative: omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0). omap_vc_i2c_init: I2C config for vdd_mpu does not match other channels (0). This allows us to identify which voltage domains have a problem, and what the I2C configuration state (a boolean, i2c_high_speed) setting being used actually is. From this we find that omap4_core_pmic has i2c_high_speed false, but omap4_iva_pmic and omap4_mpu_pmic both have it set true. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
While testing on my OMAP3430 platform, this error message was emitted: omap_vc_init_channel: PMIC info requried to configure vc forvdd_core not populated.Hence cannot initialize vc Trying to find this message was difficult because it was wrapped across several lines. It also mis-spells "required", doesn't read very well, and has spaces lacking. Let's replace it with a more concise: omap_vc_init_channel: No PMIC info for vdd_core While we're here, fix a simple spelling error in a comment. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 9月, 2011 20 次提交
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由 Kevin Hilman 提交于
Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Currently, the nominal voltage is updated in the VC post-scale function which is common to both scaling methods. However, this has readabiliy problems as this update is not where it might be expected. Instead, move the updated into voltdm_scale() upon a successful return of voltdm->scale() Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Track current nominal voltage as part of struct voltagedomain instead of omap_vdd_info, which will soon be removed. Also renames field from curr_volt to nominal_volt. No functional changes. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Create new helper function in VP layer for updating VP error gain. Currently used during pre-scale for VP force update and VC bypass. TODO: determine if this can be removed from the pre-scale path and moved to VP enable path. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
In struct omap_vp_common, the shift value can be derived from the mask value by using __ffs(), so remove the shift value for the various VPCONFIG bitfields, and use __ffs() in the code for the shift value. While here, rename field names in kerneldoc comment to match actual field names in structure. Also, cleanup indendentaion for other VP register accesses in omap_vp_init(). No functional changes. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
- move VP instance struct from vdd_info into struct voltage domain - remove _data suffix from structure name - rename vp_ prefix from vp_common field: accesses are now vp->common - move vp_enabled bool from vdd_info into VP instance - remove remaining references to omap_vdd_info No functional changes. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Instead of reading current vsel value from the VP's voltage register, just use current nominal voltage translated into vsel via the PMIC. Doing this allows VC bypass scaling to work even without a VP configured. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
On OMAP3+, all VC channels have the the same bitfield ordering for all VC channels, except the OMAP4 MPU channel. This appears to be a freak accident as all other VC channel (including OMAP5) have the standard configuration. Handle the mutant case by adding a per-channel flag to signal the deformity and handle it during VC init. Special thanks to Nishanth Menon <nm@ti.com> for finding this problem and for proposing the initial solution. Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Remove hard-coded I2C configuration in favor of settings that can be configured from PMIC-specific values. Currently only high-speed mode and the master-code value are supported, since they were the only fields currently used, but extending this is now trivial. Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse problem and making omap_vc_i2c_init() static, as well as finding and fixing a problem with the shift/mask of mcode. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Move structure containing PMIC configurable settings into struct voltagedomain. In the process, rename from omap_volt_pmic_info to omap_voltdm_pmic (_info suffix is not helpful.) No functional changes. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
VC channel configuration is programmed based on settings coming from the PMIC configuration. Currently, the VC channel to PMIC mapping is a simple one-to-one mapping. Whenever a VC channel parameter is configured (i2c slave addres, PMIC register address, on/ret/off command), the corresponding bits are enabled in the VC channel configuration register. If necessary, the programmability of channel configuration settings could be extended to board/PMIC files, however, because this patch changes the channel configuration to be programmed based on existing values from the PMIC settings, it may not be required. Also note that starting with OMAP4, where there are more than 2 channels, one channel is identified as the "default" channel. When any of the bits in the channel config for the other channels are zero, it means to use the default channel. The OMAP4 TRM (at least through NDA version Q) is wrong in describing which is the default channel. The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Configuring the on/onlp/ret/off command values is common to OMAP3 & 4. Move from OMAP3-only init into common VC init. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
- add setup_time field to struct omap_vc_channel (init'd from PMIC data) - use VC/VP register access helper for read/modify/write - move VFSM structure from omap_vdd_info into struct voltagedomain - remove redunant _data suffix from VFSM structures and variables - remove voltsetup_shift, use ffs() on the mask value to find the shift Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
The PMIC configurable variables should be isolated to VC initialization. The rest of the VC functions (like VC bypass) should use the i2c slave address and voltage register address fields from struct omap_vc_channel. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
- support both voltage register address and command register address for each VC channel - add fields for voltage register address (volra) and command register address (cmdra) to struct omap_vc_channel - use VC/VP register access read/modify/write helper - remove volra_shift field (use __ffs(mask) for shift value) - I2C addresses 10-bit, change size to u16 Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
- Add an i2c_slave_address field to the omap_vc_channel - use VC/VP read/modify/write helper instead of open-coding - remove smps_sa_shift, use __ffs(mask) for shift value - I2C addresses 10-bit, change size to u16 Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting the use of __ffs(x) instead of ffs(x) - 1. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Convert VC/VP register access to use PRM VC/VP accessor functions. In the process, move the read/write function pointers from vdd_info into struct voltagedomain. No functional changes. Additional cleanup: - remove prm_mod field from VC/VP data structures, the PRM register access functions know which PRM module to use. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
The VC layer can support PMICs with separate voltage and command registers by putting the different registers in the PRM_VC_SMPS_VOL_RA and PRCM_VC_SMPS_CMD_RA registers respectively. The PMIC data must supply at least a voltage register address (volt_reg_addr). The command register address (cmd_reg_addr) is optional. If the PMIC data does not supply a separate command register address, the VC will use the voltage register address for both. Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Kevin Hilman 提交于
Move the VC instance struct from omap_vdd_info into struct voltagedomain. While moving, perform some misc. renames for readability. No functional changes. Summary of renames: - rename omap_vc_instance to omap_vc_channel, since there is only one instance of the VC IP and this actually represents channels using TRM terminology. - rename 'vc_common' field of VC channel which led to: s/vc->vc_common/vc->common/ - remove redundant '_data' suffix - OMAP3: vc1 --> vc_mpu, vc2 --> vc_core - omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() Signed-off-by: NKevin Hilman <khilman@ti.com> merge
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由 Kevin Hilman 提交于
As part of the voltage layer cleanup, split out VC specific code into a dedicated VC layer. This patch primarily just moves VC code from voltage.c into vc.c, and adds prototypes to vc.h. No functional changes. For readability, each function was given a local 'vc' pointer: struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; and a global replace of s/vdd->vc_data/vc/ was done. Also vc_init was renamed to vc_init_channel to reflect that this is per-VC channel initializtion. Signed-off-by: NKevin Hilman <khilman@ti.com>
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