- 06 7月, 2016 1 次提交
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由 Seung-Woo Kim 提交于
This patch fixes wrong count of array for SROM registers from probe function. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com> Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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- 24 6月, 2016 1 次提交
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由 Kefeng Wang 提交于
Use helper of_platform_default_populate() in linux/of_platform when possible, instead of calling of_platform_populate() with the default match table. Acked-by: NRoger Quadros <rogerq@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 21 6月, 2016 3 次提交
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由 Paul Gortmaker 提交于
The Kconfig currently controlling compilation of this code is: drivers/memory/Kconfig:config ATMEL_EBI drivers/memory/Kconfig: bool "Atmel EBI driver" ...meaning that it currently is not being built as a module by anyone. Lets remove the few remaining modular references, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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由 Paul Gortmaker 提交于
The Kconfig for this option is currently: config ATMEL_SDRAMC bool "Atmel (Multi-port DDR-)SDRAM Controller" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modularity, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. An alternate init level might be worth considering at a later date. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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由 Honghui Zhang 提交于
Mediatek SMI has two generations of HW architecture, mt8173 uses the second generation of SMI HW while mt2701 uses the first generation HW of SMI. There's slight differences between the two generations, for generation 2, the register which control the iommu port access PA or IOVA is at each larb's register base. But for generation 1, the register is at smi ao base(smi always on register base). Besides that, the smi async clock should be prepared and enabled for SMI generation 1 HW to transform the smi clock into emi clock domain, but is not needed for SMI generation 2. This patch add SMI driver for mt2701 which use generation 1 SMI HW. Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 20 6月, 2016 2 次提交
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由 Paul Gortmaker 提交于
The Kconfig currently controlling compilation of this code is: memory/samsung/Kconfig:config EXYNOS_SROM memory/samsung/Kconfig: bool "Exynos SROM controller driver" if COMPILE_TEST ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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由 Ben Dooks 提交于
Use the relaxed versions of the IO accessors to avoid any issues if running in big endian. Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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- 17 6月, 2016 2 次提交
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由 Roger Quadros 提交于
The gpio related functions were mistakenly built only if CONFIG_OF is defined. They are needed even otherwise and will cause build failures if CONFIG_OF is not defined. Move the gpio functions outside #ifdef CONFIG_OF. Fixes: d2d00862 ("memory: omap-gpmc: Support general purpose input for WAITPINs") Signed-off-by: NRoger Quadros <rogerq@ti.com>
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由 Paul Gortmaker 提交于
The Kconfig currently controlling compilation of this code is: drivers/memory/Kconfig:config OMAP_GPMC drivers/memory/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init was not in use by this code, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We don't replace module.h with init.h since the file already has that. Cc: Roger Quadros <rogerq@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 16 6月, 2016 1 次提交
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由 Ocquidant, Sebastien 提交于
In the omap gpmc driver it can be noticed that GPMC_CONFIG4_OEEXTRADELAY is overwritten by the WEEXTRADELAY value from the device tree and GPMC_CONFIG4_WEEXTRADELAY is not updated by the value from the device tree. As a consequence, the memory accesses cannot be configured properly when the extra delay are needed for OE and WE. Fix the update of GPMC_CONFIG4_WEEXTRADELAY with the value from the device tree file and prevents GPMC_CONFIG4_OEXTRADELAY being overwritten by the WEXTRADELAY value from the device tree. Cc: stable@vger.kernel.org Signed-off-by: NOcquidant, Sebastien <sebastienocquidant@eaton.com> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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- 14 6月, 2016 3 次提交
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由 Amitoj Kaur Chawla 提交于
for_each_child_of_node() performs an of_node_get() on each iteration, so to break out of the loop an of_node_put() is required. Found using Coccinelle. The semantic patch used for this is as follows: // <smpl> @@ expression e; local idexpression n; @@ for_each_child_of_node(..., n) { ... when != of_node_put(n) when != e = n ( return n; | + of_node_put(n); ? return ...; ) ... } // </smpl> Signed-off-by: NAmitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Julia Lawall 提交于
for_each_child_of_node() performs an of_node_put() on each iteration, so putting an of_node_put() before a continue results in a double put. The semantic match that finds this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator name for_each_child_of_node; @@ for_each_child_of_node(root, child) { ... when != of_node_get(child) * of_node_put(child); ... * continue; } // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Amitoj Kaur Chawla 提交于
for_each_child_of_node() performs an of_node_get() on each iteration, so to break out of the loop an of_node_put() is required. Found using Coccinelle. The semantic patch used for this is as follows: // <smpl> @@ expression e; local idexpression n; @@ for_each_child_of_node(..., n) { ... when != of_node_put(n) when != e = n ( return n; | + of_node_put(n); ? return ...; ) ... } // </smpl> Signed-off-by: NAmitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 02 6月, 2016 1 次提交
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由 Boris Brezillon 提交于
The EBI (External Bus Interface) is used to access external peripherals (NOR, SRAM, NAND, and other specific devices like ethernet controllers). Each device is assigned a CS line and an address range and can have its own configuration (timings, access mode, bus width, ...). This driver provides a generic DT binding to configure a device according to its requirements. For specific device controllers (like the NAND one) the SMC timings should be configured by the controller driver through the matrix and smc syscon regmaps. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 06 5月, 2016 1 次提交
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由 Philipp Zabel 提交于
To allow building mediatek-drm.ko as a module, the mtk_smi_larb_get and mtk_smi_larb_put symbols have to be exported. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 02 5月, 2016 1 次提交
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由 Dan Carpenter 提交于
Presumably we never use the default: case statement which prints a warning message. But my static checker complains that if we do, we will hit an uninitialized variable warning. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 20 4月, 2016 2 次提交
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由 Boris Brezillon 提交于
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NRoger Quadros <rogerq@ti.com> Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
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由 Raghav Dogra 提交于
The new IFC controller version 2.0 has a different memory map page. Upto IFC 1.4 PAGE size is 4 KB and from IFC2.0 PAGE size is 64KB. This patch segregates the IFC global and runtime registers to appropriate PAGE sizes. Signed-off-by: NJaiprakash Singh <b44839@freescale.com> Signed-off-by: NRaghav Dogra <raghav@freescale.com> Acked-by: NLi Yang <leoyang.li@nxp.com> Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com> Acked-by: NScott Wood <oss@buserror.net> Acked-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 18 4月, 2016 2 次提交
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由 Pavel Fedin 提交于
Implement handling properties in subnodes and adding child devices to the system. Child devices will not be added if configuration fails. Since the driver now does more than suspend-resume support, dependency on CONFIG_PM is removed. Signed-off-by: NPavel Fedin <p.fedin@samsung.com> Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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由 Pankaj Dubey 提交于
This patch adds Exynos SROM controller driver which will handle save restore of SROM registers during S2R. Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> [p.fedin@samsung.com: tested on SMDK5410] Tested-by: NPavel Fedin <p.fedin@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org> [k.kozlowski: Minor COMPILE_TEST adjustments in Kconfig entries] Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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- 15 4月, 2016 9 次提交
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由 Roger Quadros 提交于
GPMC_STATUS register is private to the GPMC module and must not be accessed directly by NAND driver through the gpmc_regs. They must use gpmc_omap_get_nand_ops() instead. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
OMAPs can have 2 to 4 WAITPINs that can be used as edge triggered interrupts if not used for memory wait state insertion. Support these interrupts via the gpmc IRQ domain. The gpmc IRQ domain interrupt map is: 0 - NAND_fifoevent 1 - NAND_termcount 2 - GPMC_WAIT0 edge 3 - GPMC_WAIT1 edge, and so on Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
If the device attached to GPMC wants to use the WAIT pin for WAIT monitoring then we reserve it internally for exclusive use. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
OMAPs can have 2 to 4 WAITPINs that can be used as general purpose input if not used for memory wait state insertion. The first user will be the OMAP NAND chip to get the NAND read/busy status using gpiolib. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
We have been preventing mapping GPMC children in the first 1MB but really it has to be the first 16MB as the minimum GPMC partition size is 16MB. Also print an error message if CS mapping fails due to DT requesting address outside the GPMC map. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Move NAND specific device tree parsing to NAND driver. The NAND controller node must have a compatible id, register space resource and interrupt resource. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount. Use IRQ domain for this. NAND device tree node can then get the necessary interrupts by using gpmc as the interrupt parent. Legacy boot uses gpmc_get_client_irq to get the NAND interrupts from the GPMC IRQ domain. Get rid of custom bitmasks and use IRQ domain for that as well. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
This is needed by OMAP NAND driver to poll the empty status of the writebuffer. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
The OMAP GPMC module has certain registers dedicated for NAND access and some NAND bits mixed with other GPMC functionality. For the NAND dedicated registers we have the struct gpmc_nand_regs. The NAND driver needs to access NAND specific bits from the following non-dedicated registers - EMPTYWRITEBUFFERSTATUS from GPMC_STATUS For accessing these bits we introduce the struct gpmc_nand_ops. Add gpmc_omap_get_nand_ops() that returns the gpmc_nand_ops along with updating the gpmc_nand_regs. This API will be called by the OMAP NAND driver to access the necessary bits in GPMC register space. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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- 25 2月, 2016 1 次提交
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由 Yong Wu 提交于
This patch add SMI(Smart Multimedia Interface) driver. This driver is responsible to enable/disable iommu and control the power domain and clocks of each local arbiter. Signed-off-by: NYong Wu <yong.wu@mediatek.com> Tested-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org> Tested-by: NDaniel Kurtz <djkurtz@chromium.org> Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 08 2月, 2016 1 次提交
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由 Neil Armstrong 提交于
In order to support extended timings parameters on hardware supporting the "AAD" mode like the AM335x or DM816x, add these entries into the GPMC driver if the hardware is capable. Tested on DM816x and AM335x. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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- 02 2月, 2016 1 次提交
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由 Raghav Dogra 提交于
Replacing the NO_IRQ macro with 0. If there is no interrupt, returned value will be 0 regardless of what NO_IRQ is defined. Signed-off-by: NRaghav Dogra <raghav@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 16 12月, 2015 1 次提交
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由 Lijun Pan 提交于
Need to include sched.h to fix the following compilation error if FSL_IFC is enabled on ARM64 machine. In file included from include/linux/mmzone.h:9:0, from include/linux/gfp.h:5, from include/linux/kmod.h:22, from include/linux/module.h:13, from drivers/memory/fsl_ifc.c:22: drivers/memory/fsl_ifc.c: In function ‘check_nand_stat’: include/linux/wait.h:165:35: error: ‘TASK_NORMAL’ undeclared (first use in this function) #define wake_up(x) __wake_up(x, TASK_NORMAL, 1, NULL) ^ drivers/memory/fsl_ifc.c:136:3: note: in expansion of macro ‘wake_up’ wake_up(&ctrl->nand_wait); ^ include/linux/wait.h:165:35: note: each undeclared identifier is reported only once for each function it appears in #define wake_up(x) __wake_up(x, TASK_NORMAL, 1, NULL) ^ drivers/memory/fsl_ifc.c:136:3: note: in expansion of macro ‘wake_up’ wake_up(&ctrl->nand_wait); ^ Analysis is as follows: I put some instrumental code and get the following .h files inclusion sequence: In file included from ./arch/arm64/include/asm/compat.h:25:0, from ./arch/arm64/include/asm/stat.h:23, from include/linux/stat.h:5, from include/linux/module.h:10, from drivers/memory/fsl_ifc.c:23: include/linux/sched.h:113:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘struct’ struct sched_attr { ^ CONFIG_COMPAT=y is enabled while 39 and 48 bit VA is selected. When 42 bit VA is selected, it does not enable CONFIG_COMPAT=y In ./arch/arm64/include/asm/stat.h:23, it has "#ifdef CONFIG_COMPAT" "#include <asm/compat.h>" "..." "#endif" Since ./arch/arm64/include/asm/stat.h does not include ./arch/arm64/include/asm/compat.h, then it will not include include/linux/sched.h Hence we have to manually add "#include <linux/sched.h>" in drivers/memory/fsl_ifc.c Signed-off-by: NLijun Pan <Lijun.Pan@freescale.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 14 12月, 2015 1 次提交
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由 Vince Hsu 提交于
Tegra124 was accidentally left out when the number of TLB lines was parameterized in commit 11cec15b ("iommu/tegra-smmu: Parameterize number of TLB lines"). Fortunately this doesn't cause any noticeable regressions upstream, presumably because there aren't any use-cases that exercise enough pressure on the SMMU. But it is a regression nonetheless, so let's fix it. Fixes: 11cec15b ("iommu/tegra-smmu: Parameterize number of TLB lines") Signed-off-by: NVince Hsu <vince.h@nvidia.com> Signed-off-by: NTomasz Figa <tfiga@chromium.org> [treding@nvidia.com: extract from unrelated patch] Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 13 10月, 2015 2 次提交
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由 Uwe Kleine-König 提交于
When gpmc_cs_show_timings is called in gpmc_cs_set_timings() gpmc_cs_program_settings() was already run which modifies the CONFIG1 register. So to be more useful do the "before" dump earlier. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit 63aa945b ("memory: omap-gpmc: Add Kconfig option for debug") added a debug option for GPMC, but somehow managed to keep it unselectable. This probably happened because I had some uncommitted changes and the GPMC option is selected in the platform specific Kconfig. Let's also update the description a bit, it does not mention that enabling the debug option also disables the reset of GPMC controller during the init as pointed out by Uwe Kleine-König <u.kleine-koenig@pengutronix.de> and Roger Quadros <rogerq@ti.com>. Fixes: 63aa945b ("memory: omap-gpmc: Add Kconfig option for debug") Reported-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 05 10月, 2015 2 次提交
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Acked-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 30 9月, 2015 2 次提交
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由 Vladimir Zapolskiy 提交于
The change adds support of ARM PrimeCell PL176 MPMC. Static memory configuration of PL175 MPMC is very similar to one found on PL172 and PL175 controllers, so it is preferred to add its support into the existing driver. The difference is that PL176 supports up to 10 slave ports (but only 4 of them may be connected to static memory devices), AHB master bus width cab be 64-bit wide, also NAND devices can be interfaced. Similar to PL175 contoller, PL176 has no write buffer enable control in static memory configuration register, the rest of static memory configuration bits (with exception of NAND) is the same. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Vladimir Zapolskiy 提交于
The change adds support of ARM PrimeCell PL175 MPMC, the controller is found on NXP LPC32xx SoC. PL175 MPMC is very similar to PL172 controller, so it is preferred to add its support into the existing driver. One of the differences between PL172 and PL175 is that the latter one supports up to 6 AHB ports, but still only 4 AHB ports can be assigned to a static memory device, also PL175 does not have write buffer enable control in static memory configuration register. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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