1. 05 8月, 2010 9 次提交
  2. 01 5月, 2010 1 次提交
  3. 27 2月, 2010 2 次提交
  4. 17 12月, 2009 7 次提交
    • R
      MIPS: eXcite: Remove platform. · de4148f3
      Ralf Baechle 提交于
      The platform has never been fully merged 
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Cc: Wim Van Sebroeck <wim@iguana.be>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mtd@lists.infradead.org
      Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      Acked-by: NWim Van Sebroeck <wim@iguana.be>
      de4148f3
    • W
      MIPS: Tracing: Make function graph tracer work with -mmcount-ra-address · 7326c4e5
      Wu Zhangjin 提交于
      That thread "MIPS: Add option to pass return address location to
      _mcount" from "David Daney <ddaney@caviumnetworks.com>" have added a new
      option -mmcount-ra-address to gcc(4.5) for MIPS to transfer the location
      of the return address to _mcount.
      
      Benefit from this new feature, function graph tracer on MIPS will be
      easier and safer to hijack the return address of the kernel function,
      which will save some overhead and make the whole thing more reliable.
      
      In this patch, at first, try to enable the option -mmcount-ra-address in
      arch/mips/Makefile with cc-option, if gcc support it, it will be
      enabled, otherwise, no side effect.
      
      and then, we need to support this new option of gcc 4.5 and also support
      the old gcc versions.
      
      with _mcount in the old gcc versions, it's not easy to get the location
      of return address(tracing: add function graph tracer support for MIPS),
         so, we do it in a C function: ftrace_get_parent_addr(ftrace.c), but
         with -mmcount-ra-address, only several instructions need to get what
         we want, so, I put into asm(mcount.S). and also, as the $12(t0) is
         used by -mmcount-ra-address for transferring the localtion of return
         address to _mcount, we need to save it into the stack and restore it
         when enabled dynamic function tracer, 'Cause we have called
         "ftrace_call" before "ftrace_graph_caller", which may destroy
         $12(t0).
      
      (Thanks to David for providing that -mcount-ra-address and giving the
       idea of KBUILD_MCOUNT_RA_ADDRESS, both of them have made the whole
       thing more beautiful!)
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Nicholas Mc Guire <der.herr@hofr.at>
      Cc: zhangfx@lemote.com
      Cc: Wu Zhangjin <wuzhangjin@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Patchwork: http://patchwork.linux-mips.org/patch/681/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      7326c4e5
    • W
      MIPS: Tracing: Add static function tracer support for MIPS · d2bb0762
      Wu Zhangjin 提交于
      If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
      _mcount will be inserted into each kernel function. so, there is a
      possibility to trace the kernel functions in _mcount.
      
      This patch add the MIPS specific _mcount support for static function
      tracing. by default, ftrace_trace_function is initialized as
      ftrace_stub(an empty function), so, the default _mcount will introduce
      very little overhead. after enabling ftrace in user-space, it will jump
      to a real tracing function and do static function tracing for us.
      
      and -ffunction-sections is incompatible with -pg, so, disable it when
      ftracer is enabled.
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Reviewed-by: NSteven Rostedt <rostedt@goodmis.org>
      Cc: Nicholas Mc Guire <der.herr@hofr.at>
      Cc: zhangfx@lemote.com
      Cc: Wu Zhangjin <wuzhangjin@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Patchwork: http://patchwork.linux-mips.org/patch/672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d2bb0762
    • D
      MIPS: PowerTV: Base files for Cisco PowerTV platform · a3a0f8c8
      David VomLehn 提交于
      Add the Cisco Powertv cable settop box to the MIPS tree. This platform is
      based on a MIPS 24Kc processor with various devices integrated on the same
      ASIC. There are multiple models of this box, with differing configuration
      but the same kernel runs across the product line.
      Signed-off-by: NDavid VomLehn <dvomlehn@cisco.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: http://patchwork.linux-mips.org/patch/132/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      a3a0f8c8
    • W
      MIPS: Lemote 2F: Add a LEMOTE_MACH2F kernel option · 7d32c6dd
      Wu Zhangjin 提交于
      Add a new kernel option for Lemote Loongson 2F family machines.
      
      Lemote loongson2f family machines utilize the 2f revision of loongson
      processor and the AMD CS5536 south bridge.
      
      Family members include Fuloong 2F mini PC, Yeeloong 2F notebook, LingLoong
      all-in-one PC and others.
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Cc: zhangfx@lemote.com
      Cc: yanh@lemote.com
      Cc: huhb@lemote.com
      Cc: Nicholas Mc Guire <hofrat@hofr.at>
      Cc: Arnaud Patard <apatard@mandriva.com>
      Cc: loongson-dev@googlegroups.com
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      7d32c6dd
    • W
      MIPS: Loongson: Add basic Loongson 2F support · 6f7a251a
      Wu Zhangjin 提交于
      Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
      has a programming interface similiar to the the FPGA northbridge used on
      Loongson 2E.
      
      The main differences between Loongson 2E and Loongson 2F include:
      
      1. Loongson 2F has an extra address window configuration module, which
         is used to map CPU address space to DDR or PCI address space, or map
         the PCI-DMA address space to DDR or LIO address space.
      
      2. Loongson 2F supports 8 levels of software configurable CPu frequency
         which can be configured in the LOONGSON_CHIPCFG0 register.  The coming
         cpufreq and standby support are based on this feature.
      
      Loongson.h abstracts the modules and corresponding methods are abstracted.
      
      Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
      memory space, PCI IO space, DMA address.
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      6f7a251a
    • W
      MIPS: Add support for GZIP / BZIP2 / LZMA compressed kernel images · 1b93b3c3
      Wu Zhangjin 提交于
      This patch helps to generate smaller kernel images for linux-MIPS,
      
      Here is the effect when using lzma:
      
      $ ls -sh vmlinux
      7.1M vmlinux
      $ ls -sh vmlinuz
      1.5M vmlinuz
      
      Have tested the 32bit kernel on Qemu/Malta and 64bit kernel on FuLoong
      Mini PC. both of them work well. and also, tested by Alexander Clouter
      on an AR7 based Linksys WAG54Gv2, and by Manuel Lauss on an Alchemy
      board.
      
      This -v2 version incorporate the feedback from Ralf, and add the
      following changes:
      
      1. add .ecoff, .bin, .erec format support
      2. only enable it and the debug source code for the machines we tested
      3. a dozen of fixups and cleanups
      
      and if you want to enable it for your board, please try to select
      SYS_SUPPORTS_ZBOOT for it, and if the board have an 16550 compatible
      uart, you can select SYS_SUPPORTS_ZBOOT_UART16550 directly. and then
      sending the relative patches to Ralf.
      Tested-by: NManuel Lauss <manuel.lauss@googlemail.com>
      Tested-by: NAlexander Clouter <alex@digriz.org.uk>
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1b93b3c3
  5. 20 9月, 2009 1 次提交
    • S
      arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 · 51b563fc
      Sam Ravnborg 提交于
      Albin Tonnerre <albin.tonnerre@free-electrons.com> reported:
      
          Bash 4 filters out variables which contain a dot in them.
          This happends to be the case of CPPFLAGS_vmlinux.lds.
          This is rather unfortunate, as it now causes
          build failures when using SHELL=/bin/bash to compile,
          or when bash happens to be used by make (eg when it's /bin/sh)
      
      Remove the common definition of CPPFLAGS_vmlinux.lds by
      pushing relevant stuff to either Makefile.build or the
      arch specific kernel/Makefile where we build the linker script.
      
      This is also nice cleanup as we move the information out where
      it is used.
      
      Notes for the different architectures touched:
      
      arm - we use an already exported symbol
      cris - we use a config symbol aleady available
             [Not build tested]
      mips - the jiffies complexity has moved to vmlinux.lds.S where we need it.
             Added a few variables to CPPFLAGS - they are only used by
             the linker script.
             [Not build tested]
      powerpc - removed assignment that is not needed
                [not build tested]
      sparc - simplified it using $(BITS)
      um - introduced a few new exported variables to deal with this
      xtensa - added options to CPP invocation
               [not build tested]
      
      Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Chris Zankel <chris@zankel.net>
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      51b563fc
  6. 18 9月, 2009 4 次提交
  7. 03 7月, 2009 1 次提交
  8. 17 6月, 2009 3 次提交
    • W
      MIPS: Add hibernation support · 363c55ca
      Wu Zhangjin 提交于
      [Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
      support.  As implemented in this patch cache and tlb flushing will also be
      invoked with interrupts disabled so smp_call_function() will blow up in
      charming ways.  So limit to !SMP.]
      Reviewed-by: NPavel Machek <pavel@ucw.cz>
      Reviewed-by: NYan Hua <yanh@lemote.com>
      Reviewed-by: NArnaud Patard <apatard@mandriva.com>
      Reviewed-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
      Signed-off-by: NHu Hongbing <huhb@lemote.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      363c55ca
    • M
      MIPS: Alchemy: Rewrite GPIO support. · 51e02b02
      Manuel Lauss 提交于
      The current in-kernel Alchemy GPIO support is far too inflexible for
      all my use cases.  To address this, the following changes are made:
      
      * create generic functions which deal with manipulating the on-chip
        GPIO1/2 blocks.  Such functions are universally useful.
      * Macros for GPIO2 shared interrupt management and block control.
      * support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.
      
        If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
        compatibility by directly inlining the GPIO1/2 functions.  GPIO access
        is limited to on-chip ones and they can be accessed as documented in
        the datasheets (GPIO0-31 and 200-215).
      
        If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
        one for GPIO2, are registered.  GPIOs can still be accessed by using
        the numberspace established in the databooks.
      
        However this is not yet flexible enough for my uses:  My Alchemy
        systems have a documented "external" gpio interface (fixed, different
        numberspace) and can support a variety of baseboards, some of which
        are equipped with I2C gpio expanders.  I want to be able to provide
        the default 16 GPIOs of the CPU board numbered as 0..15 and also
        support gpio expanders, if present, starting as gpio16.
      
        To achieve this, a new Kconfig symbol for Alchemy is introduced,
        CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
        that they don't want the Alchemy numberspace exposed to the outside
        world, but instead want to provide their own.  Boards are now respon-
        sible for providing the linux gpio interface glue code (either in a
        custom gpio.h header (in board include directory) or with gpio_chips).
      
        To make the board-specific inlined gpio functions work, the MIPS
        Makefile must be changed so that the mach-au1x00/gpio.h header is
        included _after_ the board headers, by moving the inclusion of
        the mach-au1x00/ to the end of the header list.
      
        See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
      Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
      Acked-by: NFlorian Fainelli <florian@openwrt.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      51e02b02
    • I
      MIPS: Sibyte: Remove standalone kernel support · 05f94eeb
      Imre Kaloz 提交于
      CFE is the only supported and used bootloader on the SiByte boards,
      the standalone kernel support has been never used outside Broadcom.
      Remove it and make the kernel use CFE by default.
      Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      05f94eeb
  9. 21 5月, 2009 1 次提交
  10. 14 5月, 2009 2 次提交
  11. 30 3月, 2009 1 次提交
  12. 14 3月, 2009 1 次提交
  13. 11 1月, 2009 2 次提交
  14. 28 10月, 2008 4 次提交
  15. 11 10月, 2008 1 次提交