1. 08 5月, 2018 1 次提交
  2. 12 2月, 2018 1 次提交
  3. 26 12月, 2017 3 次提交
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  5. 29 11月, 2017 1 次提交
  6. 23 10月, 2017 1 次提交
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  9. 24 1月, 2017 1 次提交
  10. 14 11月, 2016 1 次提交
  11. 02 11月, 2016 1 次提交
  12. 09 8月, 2016 2 次提交
  13. 17 9月, 2015 1 次提交
  14. 30 3月, 2015 1 次提交
  15. 05 1月, 2015 2 次提交
  16. 23 11月, 2014 2 次提交
  17. 16 9月, 2014 2 次提交
  18. 11 9月, 2014 1 次提交
    • M
      ARM: DT: imx53: fix lvds channel 1 port · 1b134c9c
      Markus Niebel 提交于
      using LVDS channel 1 on an i.MX53 leads to following error:
      
      imx-ldb 53fa8008.ldb: unable to set di0 parent clock to ldb_di1
      
      This comes from imx_ldb_set_clock with mux = 0. Mux parameter must be "1" for
      reparenting di1 clock to ldb_di1. The value of the mux param comes from device
      tree port settings.
      
      On i.MX5, the internal two-input-multiplexer is used. Due to hardware limitations,
      only one port (port@[0,1]) can be used for each channel (lvds-channel@[0,1],
      respectively)
      
      Documentation update suggested by Philipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>
      Fixes: e05c8c9a ("ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi")
      Cc: <stable@vger.kernel.org>
      Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      1b134c9c
  19. 18 8月, 2014 1 次提交
  20. 18 7月, 2014 3 次提交
  21. 16 5月, 2014 2 次提交
  22. 11 5月, 2014 1 次提交
  23. 30 4月, 2014 1 次提交
  24. 14 4月, 2014 2 次提交
  25. 08 3月, 2014 1 次提交
    • P
      ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi · e05c8c9a
      Philipp Zabel 提交于
      This patch connects IPU and display encoder (VGA, LVDS)
      device tree nodes, as well as parallel displays on the DISP0
      and DISP1 outputs, using the OF graph bindings described in
      Documentation/devicetree/bindings/media/video-interfaces.txt
      
      The IPU ports correspond to the two display interfaces. The
      order of endpoints in the ports is arbitrary.
      
      Since the imx-drm node now only needs to contain links to the
      display interfaces, it can be moved to the SoC dtsi level. At
      the board level, only connections between the display interface
      ports and encoders or panels have to be added.
      Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e05c8c9a
  26. 09 2月, 2014 5 次提交