1. 24 5月, 2018 2 次提交
    • M
      MIPS: ptrace: Fix PTRACE_PEEKUSR requests for 64-bit FGRs · c7e81462
      Maciej W. Rozycki 提交于
      Use 64-bit accesses for 64-bit floating-point general registers with
      PTRACE_PEEKUSR, removing the truncation of their upper halves in the
      FR=1 mode, caused by commit bbd426f5 ("MIPS: Simplify FP context
      access"), which inadvertently switched them to using 32-bit accesses.
      
      The PTRACE_POKEUSR side is fine as it's never been broken and continues
      using 64-bit accesses.
      
      Fixes: bbd426f5 ("MIPS: Simplify FP context access")
      Signed-off-by: NMaciej W. Rozycki <macro@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 3.15+
      Patchwork: https://patchwork.linux-mips.org/patch/19334/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      c7e81462
    • M
      MIPS: prctl: Disallow FRE without FR with PR_SET_FP_MODE requests · 28e4213d
      Maciej W. Rozycki 提交于
      Having PR_FP_MODE_FRE (i.e. Config5.FRE) set without PR_FP_MODE_FR (i.e.
      Status.FR) is not supported as the lone purpose of Config5.FRE is to
      emulate Status.FR=0 handling on FPU hardware that has Status.FR=1
      hardwired[1][2].  Also we do not handle this case elsewhere, and assume
      throughout our code that TIF_HYBRID_FPREGS and TIF_32BIT_FPREGS cannot
      be set both at once for a task, leading to inconsistent behaviour if
      this does happen.
      
      Return unsuccessfully then from prctl(2) PR_SET_FP_MODE calls requesting
      PR_FP_MODE_FRE to be set with PR_FP_MODE_FR clear.  This corresponds to
      modes allowed by `mips_set_personality_fp'.
      
      References:
      
      [1] "MIPS Architecture For Programmers, Vol. III: MIPS32 / microMIPS32
          Privileged Resource Architecture", Imagination Technologies,
          Document Number: MD00090, Revision 6.02, July 10, 2015, Table 9.69
          "Config5 Register Field Descriptions", p. 262
      
      [2] "MIPS Architecture For Programmers, Volume III: MIPS64 / microMIPS64
          Privileged Resource Architecture", Imagination Technologies,
          Document Number: MD00091, Revision 6.03, December 22, 2015, Table
          9.72 "Config5 Register Field Descriptions", p. 288
      
      Fixes: 9791554b ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
      Signed-off-by: NMaciej W. Rozycki <macro@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 4.0+
      Patchwork: https://patchwork.linux-mips.org/patch/19327/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      28e4213d
  2. 15 5月, 2018 2 次提交
  3. 03 4月, 2018 8 次提交
  4. 20 3月, 2018 1 次提交
  5. 17 3月, 2018 1 次提交
  6. 16 3月, 2018 1 次提交
  7. 12 3月, 2018 1 次提交
    • P
      perf/core: Remove perf_event::group_entry · 8343aae6
      Peter Zijlstra 提交于
      Now that all the grouping is done with RB trees, we no longer need
      group_entry and can replace the whole thing with sibling_list.
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Alexey Budankov <alexey.budankov@linux.intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: David Carrillo-Cisneros <davidcc@google.com>
      Cc: Dmitri Prokhorov <Dmitry.Prohorov@intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Kan Liang <kan.liang@intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Valery Cherepennikov <valery.cherepennikov@intel.com>
      Cc: Vince Weaver <vincent.weaver@maine.edu>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      8343aae6
  8. 09 3月, 2018 2 次提交
    • M
      MIPS: pm-cps: Block system suspend when a JTAG probe is present · b2ed33a8
      Matt Redfearn 提交于
      If a JTAG probe is connected to a MIPS cluster, then the CPC detects it
      and latches the CPC.STAT_CONF.EJTAG_PROBE bit to 1. While set,
      attempting to send a power-down command to a core will be blocked, and
      the CPC will instead send the core to clock-off state. This can
      interfere with systems fully entering a low power state where all cores,
      CM, GIC, etc are powered down.
      
      Detect that a JTAG probe is / has been connected to the cluster and
      block the suspend attempt.
      
      Attempting to suspend the system while a JTAG probe is connected now
      yields:
       # echo mem > /sys/power/state
       [   11.654000] PM: Syncing filesystems ... done.
       [   11.658000] JTAG probe is connected - abort suspend
       -sh: echo: write error: Operation not permitted
       #
      
      To restore suspend, the JTAG probe should be disconnected or put into
      quiescent state. Platform code can then clear the
      CPC.STAT_CONF.EJTAG_PROBE bit.
      Reported-by: NEd Blake <ed.blake@sondrel.com>
      Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/18641/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      b2ed33a8
    • P
      MIPS: Hang more efficiently on halt/powerdown/restart · 997e93d4
      Paul Burton 提交于
      The generic MIPS implementations of halting, powering down or restarting
      the system all hang using a busy loop as a last resort. We have many
      platforms which avoid this loop by implementing their own, many using
      some variation upon executing a wait instruction to lower CPU power
      usage if we reach this point.
      
      In order to prepare for cleaning up these various custom implementations
      of the same thing, this patch makes the generic machine_halt(),
      machine_power_off() & machine_restart() functions each make use of the
      wait instruction to lower CPU power usage in cases where we know that
      the wait instruction is available. If wait isn't known to be supported
      then we fall back to calling cpu_wait(), and if we don't have a
      cpu_wait() callback then we effectively continue using a busy loop.
      
      In effect the new machine_hang() function provides a superset of the
      functionality that the various platforms currently provide differing
      subsets of.
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17178/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      997e93d4
  9. 06 3月, 2018 1 次提交
    • J
      MIPS: BMIPS: Do not mask IPIs during suspend · 06a3f0c9
      Justin Chen 提交于
      Commit a3e6c1ef ("MIPS: IRQ: Fix disable_irq on CPU IRQs") fixes an
      issue where disable_irq did not actually disable the irq. The bug caused
      our IPIs to not be disabled, which actually is the correct behavior.
      
      With the addition of commit a3e6c1ef ("MIPS: IRQ: Fix disable_irq on
      CPU IRQs"), the IPIs were getting disabled going into suspend, thus
      schedule_ipi() was not being called. This caused deadlocks where
      schedulable task were not being scheduled and other cpus were waiting
      for them to do something.
      
      Add the IRQF_NO_SUSPEND flag so an irq_disable will not be called on the
      IPIs during suspend.
      Signed-off-by: NJustin Chen <justinpopo6@gmail.com>
      Fixes: a3e6c1ef ("MIPS: IRQ: Fix disabled_irq on CPU IRQs")
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: stable@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/17385/
      [jhogan@kernel.org: checkpatch: wrap long lines and fix commit refs]
      Signed-off-by: NJames Hogan <jhogan@kernel.org>
      06a3f0c9
  10. 20 2月, 2018 1 次提交
  11. 19 2月, 2018 2 次提交
  12. 13 2月, 2018 2 次提交
  13. 12 2月, 2018 1 次提交
    • L
      vfs: do bulk POLL* -> EPOLL* replacement · a9a08845
      Linus Torvalds 提交于
      This is the mindless scripted replacement of kernel use of POLL*
      variables as described by Al, done by this script:
      
          for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do
              L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'`
              for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done
          done
      
      with de-mangling cleanups yet to come.
      
      NOTE! On almost all architectures, the EPOLL* constants have the same
      values as the POLL* constants do.  But they keyword here is "almost".
      For various bad reasons they aren't the same, and epoll() doesn't
      actually work quite correctly in some cases due to this on Sparc et al.
      
      The next patch from Al will sort out the final differences, and we
      should be all done.
      Scripted-by: NAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      a9a08845
  14. 08 2月, 2018 1 次提交
  15. 05 2月, 2018 2 次提交
  16. 31 1月, 2018 1 次提交
  17. 23 1月, 2018 3 次提交
  18. 19 1月, 2018 3 次提交
  19. 16 1月, 2018 2 次提交
    • E
      signal: Unify and correct copy_siginfo_to_user32 · ea64d5ac
      Eric W. Biederman 提交于
      Among the existing architecture specific versions of
      copy_siginfo_to_user32 there are several different implementation
      problems.  Some architectures fail to handle all of the cases in in
      the siginfo union.  Some architectures perform a blind copy of the
      siginfo union when the si_code is negative.  A blind copy suggests the
      data is expected to be in 32bit siginfo format, which means that
      receiving such a signal via signalfd won't work, or that the data is
      in 64bit siginfo and the code is copying nonsense to userspace.
      
      Create a single instance of copy_siginfo_to_user32 that all of the
      architectures can share, and teach it to handle all of the cases in
      the siginfo union correctly, with the assumption that siginfo is
      stored internally to the kernel is 64bit siginfo format.
      
      A special case is made for x86 x32 format.  This is needed as presence
      of both x32 and ia32 on x86_64 results in two different 32bit signal
      formats.  By allowing this small special case there winds up being
      exactly one code base that needs to be maintained between all of the
      architectures.  Vastly increasing the testing base and the chances of
      finding bugs.
      
      As the x86 copy of copy_siginfo_to_user32 the call of the x86
      signal_compat_build_tests were moved into sigaction_compat_abi, so
      that they will keep running.
      Signed-off-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      ea64d5ac
    • E
      signal: Unify and correct copy_siginfo_from_user32 · 212a36a1
      Eric W. Biederman 提交于
      The function copy_siginfo_from_user32 is used for two things, in ptrace
      since the dawn of siginfo for arbirarily modifying a signal that
      user space sees, and in sigqueueinfo to send a signal with arbirary
      siginfo data.
      
      Create a single copy of copy_siginfo_from_user32 that all architectures
      share, and teach it to handle all of the cases in the siginfo union.
      
      In the generic version of copy_siginfo_from_user32 ensure that all
      of the fields in siginfo are initialized so that the siginfo structure
      can be safely copied to userspace if necessary.
      
      When copying the embedded sigval union copy the si_int member.  That
      ensures the 32bit values passes through the kernel unchanged.
      Signed-off-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      212a36a1
  20. 10 1月, 2018 1 次提交
    • J
      MIPS: CM: Drop WARN_ON(vp != 0) · c04de7b1
      James Hogan 提交于
      Since commit 68923cdc ("MIPS: CM: Add cluster & block args to
      mips_cm_lock_other()"), mips_smp_send_ipi_mask() has used
      mips_cm_lock_other_cpu() with each CPU number, rather than
      mips_cm_lock_other() with the first VPE in each core. Prior to r6,
      multicore multithreaded systems such as dual-core dual-thread
      interAptivs with CPU Idle enabled (e.g. MIPS Creator Ci40) results in
      mips_cm_lock_other() repeatedly hitting WARN_ON(vp != 0).
      
      There doesn't appear to be anything fundamentally wrong about passing a
      non-zero VP/VPE number, even if it is a core's region that is locked
      into the other region before r6, so remove that particular WARN_ON().
      
      Fixes: 68923cdc ("MIPS: CM: Add cluster & block args to mips_cm_lock_other()")
      Signed-off-by: NJames Hogan <jhogan@kernel.org>
      Reviewed-by: NPaul Burton <paul.burton@mips.com>
      Cc: linux-mips@linux-mips.org
      Cc: stable@vger.kernel.org # 4.14+
      Patchwork: https://patchwork.linux-mips.org/patch/17883/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      c04de7b1
  21. 20 12月, 2017 1 次提交
    • M
      MIPS: Validate PR_SET_FP_MODE prctl(2) requests against the ABI of the task · b67336ee
      Maciej W. Rozycki 提交于
      Fix an API loophole introduced with commit 9791554b ("MIPS,prctl:
      add PR_[GS]ET_FP_MODE prctl options for MIPS"), where the caller of
      prctl(2) is incorrectly allowed to make a change to CP0.Status.FR or
      CP0.Config5.FRE register bits even if CONFIG_MIPS_O32_FP64_SUPPORT has
      not been enabled, despite that an executable requesting the mode
      requested via ELF file annotation would not be allowed to run in the
      first place, or for n64 and n64 ABI tasks which do not have non-default
      modes defined at all.  Add suitable checks to `mips_set_process_fp_mode'
      and bail out if an invalid mode change has been requested for the ABI in
      effect, even if the FPU hardware or emulation would otherwise allow it.
      
      Always succeed however without taking any further action if the mode
      requested is the same as one already in effect, regardless of whether
      any mode change, should it be requested, would actually be allowed for
      the task concerned.
      Signed-off-by: NMaciej W. Rozycki <macro@mips.com>
      Fixes: 9791554b ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
      Reviewed-by: NPaul Burton <paul.burton@mips.com>
      Cc: James Hogan <james.hogan@mips.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Cc: stable@vger.kernel.org # 4.0+
      Patchwork: https://patchwork.linux-mips.org/patch/17800/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b67336ee
  22. 13 12月, 2017 1 次提交