This allows for consistent numbering of the IPU output and
input ports.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This has been moved to the reg property where it belongs for quite some
time. The range has been unused by the kernel since then and with kernel
4.4 it's flagged as an unparsable range, as it does not comply to the
PCI ranges DT binding. Fix this by removing the superfluous range.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Audio IP need the spba clock, but original clock name "dma" is not
accurate, so change it to name "spba". The audio driver has been
using the new name "spba", the binding document has been updated.
Signed-off-by: NShengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Signed-off-by: NAlison Wang <b18965@freescale.com>
Signed-off-by: NXiubo Li <lixiubo@cmss.chinamobile.com>
Signed-off-by: NJianwei Wang <jianwei.wang.chn@gmail.com>
Signed-off-by: NMeng Yi <b56799@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Signed-off-by: NAlison Wang <b18965@freescale.com>
Signed-off-by: NXiubo Li <lixiubo@cmss.chinamobile.com>
Signed-off-by: NJianwei Wang <jianwei.wang.chn@gmail.com>
Signed-off-by: NMeng Yi <b56799@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

As on i.MX7D, we using a virtual arm clk for CPU frequency
scaling, so correct the clocks info used by the cpufreq driver.
Signed-off-by: NBai Ping <b51503@freescale.com>
Acked-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This addes support for SPI available on an off-board connector available on
some models of the GW52xx.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Ventana boards have an off-board connector with signals that can be pinmuxed
as either GPIO or PWM. This patch adds pwm device-tree nodes in the disabled
state which the bootloader can decide to enable based on bootloader config.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via
Cortex-A5 running Linux using Stefan Agner's <stefan@agner.ch> "m4boot"
utility.
Signed-off-by: NAfzal Mohammed <afzal.mohd.ma@gmail.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Extend the existing Vybrid DSPI devicetree implementation to also
describe the dspi2 and dspi3 functional blocks.
Signed-off-by: NCory Tusar <cory.tusar@pid1solutions.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This, together with the corresponding patch to pwm-imx.c,  allows to order the
pwm devices correctly.
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

imx6qdl.dtsi uses compatibles "fsl,imx6q-gpt", "fsl,imx31-gpt".
imx6dl.dtsi uses compatibles "fsl,imx6dl-gpt", "fsl,imx6q-gpt" since
commit

	4e415ed8 (ARM: dts: imx6dl: add imx6dl gpt specific compatible string)

If imx6dl would be compatible with imx6q-gpt it would also have to be
compatible with imx31-gpt which is currently missing.

Based on the above mentioned patch I assume imx6q-gpt and imx6dl-gpt are
not compatible. So imx6q-gpt should be removed as compatible.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the displays supported by the Ventana boards.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Signed-off-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The GW54xx PMIC swbst regulator is used for LVDS power, CANbus xceiver
and HDMI DDC and is enabled by the bootloader. Set the regulator to
always-on so that Linux doesn't turn it off thinking its not needed.
Signed-off-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This patch adds some values that are needed for an out-of-tree device
tree I'm currently working with.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for ADC1.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Specify the 'adck-max-frequency' property in the adc nodes.

According to Documentation/devicetree/bindings/iio/adc/vf610-adc.txt
this is a recommended property.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

It can improve the USB performance when choosing larger
burst size at some systems (bus size is larger), there is
no side effect if this burst size is larger than bus size.
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

After setting ahb burst configuration as 0, we can increase tx/rx
burst size, it will improve the USB performance
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Gateworks Ventana boards seem to need "RGMII-ID" (internal delay)
PHY mode, instead of simple "RGMII", for their Marvell 88E1510
transceiver. Otherwise, the Ethernet MAC doesn't work with Marvell PHY
driver (TX doesn't seem to work correctly).

Tested on GW5400 rev. C.

This bug affects ARM Fedora 23.
Signed-off-by: NKrzysztof Hałasa <khalasa@piap.pl>
Acked-by: NTim Harvey <tharvey@gateworks.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The 'assigned-clock-parents' and 'assigned-clock-rates' list
should corresponding to the 'assigned-clocks' property clock list.
Signed-off-by: NBai Ping <b51503@freescale.com>
Fixes: ed339363 ("ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously")
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Linux on Vybrid used several different L2 latencies so far, none
of them seem to be the right ones. According to the application note
AN4947 ("Understanding Vybrid Architecture"), the tag portion runs
on CPU clock and is inside the L2 cache controller, whereas the data
portion is stored in the external SRAM running on platform clock.
Hence it is likely that the correct value requires a higher data
latency then tag latency.

These are the values which have been used so far:
- The mainline values:
  arm,data-latency = <1 1 1>;
  arm,tag-latency = <2 2 2>;
  Those values have lead to problems on higher clocks. They look
  like a poor translation from the reset values (missing +1 offset
  and a mix up between tag/latency values).
- The Linux 3.0 (SoC vendor BSP) values (converted to DT notation):
  arm,data-latency = <4 2 3>
  arm,tag-latency = <4 2 3>
  The cache initialization function along with the value matches the
  i.MX6 code from the same kernel, so it seems that those values have
  just been copied.
- The Colibri values:
  arm,data-latency = <2 1 2>;
  arm,tag-latency = <3 2 3>;
  Those were a mix between the values of the Linux 3.0 based BSP and
  the mainline values above.
- The SoC Reset values (converted to DT notation):
  arm,data-latency = <3 3 3>;
  arm,tag-latency = <2 2 2>;

So far there is no official statement on what the correct values are.
See also the related Freescale community thread:
https://community.freescale.com/message/579785#579785

For now, the reset values seem to be the best bet. Remove all other
"bogus" values and use the reset value on vf610.dtsi level.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

To obtain exact pixel clocks, allow the DI clock selectors to influence
the PLLs that they are derived from.

Commit 4591b132 ("ARM: i.MX6: ipu_di_sel clocks can set parent
rates") did this for i.MX6.
Port it to enable high display resolutions on i.MX53 based platforms
such as CX9020 Embedded PC, too.
Signed-off-by: NPatrick Brünn <p.bruenn@beckhoff.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

As we already have a 'imx_check_clocks' to do the clock error
check, so cleanup the error check code.
Signed-off-by: NBai Ping <b51503@freescale.com>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.
Signed-off-by: NBai Ping <b51503@freescale.com>
Acked-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

So far, only the bus clock has been assigned, but in reality the
SAI IP has for clock inputs. The driver has been updated to
make use of the additional clock inputs by c3ecef21 ("ASoC:
fsl_sai: add sai master mode support"). Due to a bug in the
clock tree, the audio clock has been enabled none the less by
the specified bus clock (see "ARM: imx: clk-vf610: fix SAI
clock tree"), which made master mode even without the proper
clock assigned working.

This patch completes the clock definition for SAI2. On Vybrid,
only two MCLK out of the four options are available (the first
being the bus clock itself). See chapter 8.10.1.2.3 of the
Vybrid Reference manual ("SAI transmitter and receiver options
for MCLK selection"). Note: The audio clocks are only required
in master mode.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The Synchronous Audio Interface (SAI) instances are clocked by
independent clocks: The bus clock and the audio clock (as shown in
Figure 51-1 in the Vybrid Reference Manual). The clock gates in
CCGR0/CCGR1 for SAI0 through SAI3 are bus clock gates, as access
tests to the registers with/without gating those clocks have shown.
The audio clock is gated by the SAIx_EN gates in CCM_CSCDR1,
followed by a clock divider (SAIx_DIV). Currently, the parent of
the bus clock gates has been assigned to SAIx_DIV, which is not
involved in the bus clock path for the SAI instances (see chapter
9.10.12, SAI clocking in the Vybrid Reference Manual).

Fix this by define the parent clock of VF610_CLK_SAIx to be the bus
clock.

If the driver needs the audio clock (when used in master mode), a
fixed device tree is required which assign the audio clock properly
to VF610_CLK_SAIx_DIV.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

OSC can be used as USB hub source clock. An example we can route to
CLK2_P imx6 pin.

This show a usage example:

[...]
	usb_hub: usb-hub {
		compatible = "smsc,usb3503a";
		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
		clock-names = "refclk";
	};
};

[...]
&clks {
        assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
        assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
};

/sys/kernel/debug/clk/clk_summary

osc                                 5            5    24000000          0 0
[...]
    lvds2_sel                       1            1    24000000          0 0
       lvds2_gate                   1            1    24000000          0 0
[...]
Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add 'is_prepared' callback function for pllv3 type clk to make sure when
the system is bootup, the unused clk is in a known state to match the
prepare count info.
Signed-off-by: NBai Ping <b51503@freescale.com>
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The 'osc' clock is already initialized by the fixed clock defined in
imx25.dtsi. The imx25 clock driver tries to add this clock for a second
time and fails with -EEXIST:
	i.MX clk 1: register failed with -17

As the clock is already properly setup in DT with a different driver, we
can completely remove the handling in the imx25 clock driver.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Per the Vybrid Reference Manual (section 3.8.6.1), dspi0 has 6 chip
select signals associated with it, while dspi1 has only 4.
Signed-off-by: NCory Tusar <cory.tusar@pid1solutions.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

GPC irq domain is a child domain of GIC, now all of platform irqs
are inside GPC domain, during the module populate, all devices irq
should have correct type setting in GIC, however, there is no
.irq_set_type callback setting in GPC, so the irq_set_type will be
skipped and cause all irqs' type in /proc/interrupt are "edge" which
mismatch with irq type setting in dtb file. Since GPC has no irq
type setting, so just tell kernel to use irq_chip_set_type_parent.
Signed-off-by: NAnson Huang <Anson.Huang@freescale.com>
Cc: <stable@vger.kernel.org> # 4.1+
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Something seems to have gone wrong during the merging of the device
tree changes with the following patch

"ARM: dts: add property for maximum ADC clock frequencies"

The property "fsl,adck-max-frequency" instead of being applied for
the ADC1 node got applied to the esdhc0 node. This patch fixes it.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Fixes: def0641e ("ARM: dts: add property for maximum ADC clock frequencies")
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Pull perf updates from Thomas Gleixner:
 "Mostly updates to the perf tool plus two fixes to the kernel core code:

   - Handle tracepoint filters correctly for inherited events (Peter
     Zijlstra)

   - Prevent a deadlock in perf_lock_task_context (Paul McKenney)

   - Add missing newlines to some pr_err() calls (Arnaldo Carvalho de
     Melo)

   - Print full source file paths when using 'perf annotate --print-line
     --full-paths' (Michael Petlan)

   - Fix 'perf probe -d' when just one out of uprobes and kprobes is
     enabled (Wang Nan)

   - Add compiler.h to list.h to fix 'make perf-tar-src-pkg' generated
     tarballs, i.e. out of tree building (Arnaldo Carvalho de Melo)

   - Add the llvm-src-base.c and llvm-src-kbuild.c files, generated by
     the 'perf test' LLVM entries, when running it in-tree, to
     .gitignore (Yunlong Song)

   - libbpf error reporting improvements, using a strerror interface to
     more precisely tell the user about problems with the provided
     scriptlet, be it in C or as a ready made object file (Wang Nan)

   - Do not be case sensitive when searching for matching 'perf test'
     entries (Arnaldo Carvalho de Melo)

   - Inform the user about objdump failures in 'perf annotate' (Andi
     Kleen)

   - Improve the LLVM 'perf test' entry, introduce a new ones for BPF
     and kbuild tests to check the environment used by clang to compile
     .c scriptlets (Wang Nan)"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (32 commits)
  perf/x86/intel/rapl: Remove the unused RAPL_EVENT_DESC() macro
  tools include: Add compiler.h to list.h
  perf probe: Verify parameters in two functions
  perf session: Add missing newlines to some pr_err() calls
  perf annotate: Support full source file paths for srcline fix
  perf test: Add llvm-src-base.c and llvm-src-kbuild.c to .gitignore
  perf: Fix inherited events vs. tracepoint filters
  perf: Disable IRQs across RCU RS CS that acquires scheduler lock
  perf test: Do not be case sensitive when searching for matching tests
  perf test: Add 'perf test BPF'
  perf test: Enhance the LLVM tests: add kbuild test
  perf test: Enhance the LLVM test: update basic BPF test program
  perf bpf: Improve BPF related error messages
  perf tools: Make fetch_kernel_version() publicly available
  bpf tools: Add new API bpf_object__get_kversion()
  bpf tools: Improve libbpf error reporting
  perf probe: Cleanup find_perf_probe_point_from_map to reduce redundancy
  perf annotate: Inform the user about objdump failures in --stdio
  perf stat: Make stat options global
  perf sched latency: Fix thread pid reuse issue
  ...

Pull scheduler fix from Thomas Gleixner:
 "A single fix to prevent math underflow in the numa balancing code"

* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/numa: Fix math underflow in task_tick_numa()

Pull liblockdep fixes from Thomas Gleixner:
 "Three small patches to synchronize liblockdep with the latest core
  changes"

* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tools/liblockdep: explicitly declare lockdep API we call from liblockdep
  tools/liblockdep: add userspace versions of WRITE_ONCE and RCU_INIT_POINTER
  tools/liblockdep: remove task argument from debug_check_no_locks_held

Pull x86 fixes from Thomas Gleixner:
 "A couple of fixes and updates related to x86:

   - Fix the W+X check regression on XEN

   - The real fix for the low identity map trainwreck

   - Probe legacy PIC early instead of unconditionally allocating legacy
     irqs

   - Add cpu verification to long mode entry

   - Adjust the cache topology to AMD Fam17H systems

   - Let Merrifield use the TSC across S3"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Call verify_cpu() after having entered long mode too
  x86/setup: Fix low identity map for >= 2GB kernel range
  x86/mm: Skip the hypervisor range when walking PGD
  x86/AMD: Fix last level cache topology for AMD Fam17h systems
  x86/irq: Probe for PIC presence before allocating descs for legacy IRQs
  x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield