- 14 1月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Acked-by: NNicolas Pitre <nico@fluxnic.net>
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- 09 1月, 2011 1 次提交
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 15 12月, 2010 2 次提交
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> Acked-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> Acked-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 29 11月, 2010 1 次提交
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由 Konstantin Sinyuk 提交于
This patch adds support for CM-A510 machine Signed-off-by: NKonstantin Sinyuk <kostyas@compulab.co.il> Signed-off-by: NMike Rapoport <mike@compulab.co.il> Reviewed-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 20 10月, 2010 2 次提交
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由 Nicolas Pitre 提交于
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
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由 Jeremy Kerr 提交于
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 20 9月, 2010 1 次提交
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@canonical.com> Acked-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 17 7月, 2010 1 次提交
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 16 2月, 2010 1 次提交
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由 Fenkart/Bostandzhyan 提交于
Makes it consistent with VMALLOC_START Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NAndreas Fenkart <andreas.fenkart@streamunlimited.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 2月, 2010 1 次提交
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由 Tony Lindgren 提交于
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 2月, 2010 1 次提交
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由 H Hartley Sweeten 提交于
The (void *) cast is not needed when setting dev.platform_data to the address of the data. Remove the casts. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 28 11月, 2009 2 次提交
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由 Lennert Buytenhek 提交于
Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Saeed Bishara 提交于
The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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