1. 01 8月, 2015 1 次提交
  2. 12 8月, 2013 1 次提交
    • W
      ARM: spinlock: use inner-shareable dsb variant prior to sev instruction · 73a6fdc4
      Will Deacon 提交于
      When unlocking a spinlock, we use the sev instruction to signal other
      CPUs waiting on the lock. Since sev is not a memory access instruction,
      we require a dsb in order to ensure that the sev is not issued ahead
      of the store placing the lock in an unlocked state.
      
      However, as sev is only concerned with other processors in a
      multiprocessor system, we can restrict the scope of the preceding dsb
      to the inner-shareable domain. Furthermore, we can restrict the scope to
      consider only stores, since there are no independent loads on the unlock
      path.
      
      A side-effect of this change is that a spin_unlock operation no longer
      forces completion of pending TLB invalidation, something which we rely
      on when unlocking runqueues to ensure that CPU migration during TLB
      maintenance routines doesn't cause us to continue before the operation
      has completed.
      
      This patch adds the -ishst suffix to the ARMv7 definition of dsb_sev()
      and adds an inner-shareable dsb to the context-switch path when running
      a preemptible, SMP, v7 kernel.
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      73a6fdc4
  3. 29 3月, 2012 1 次提交