Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13308/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13307/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13306/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Mediatek MT7620 SoC has syscfg0 bits where it sets the type of memory being used.
However, sometimes those bits are not set properly (reading "11"). In this case, the SoC assumes SDRAM.
The patch below reflects that.
Signed-off-by: NSashka Nochkin <linux-mips@durdom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13135/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The old address is no longer valid. Use the my new one instead.
Signed-off-by: NJohn Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13201/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11995/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Ralink was acquired by Mediatek. Represent this in the cpuinfo. It
apparently confused people.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11994/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Commit 418d29c8 ("MIPS: ralink: Unify SoC id handling") was not fully
correct. The logic for the SoC check got inverted. We need to check if it
is not a MT76x8.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11992/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

A few fixes to the pinmux data, 2 new muxes and a minor whitespace
cleanup.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11991/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The code currently panics if PCI is enabled but the SoC has no PCI bus.
This check is superfluous as the driver only loads if enabled in the
devicetree.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11444/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

If the USB HCD is running and the cpu is scaled too low, then the USB
stops working. Increase the idle speed of the core to fix this if the
kernel is built with USB support.

The "magic" values are taken from the Ralink SDK Kernel.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11441/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This makes detection a lot easier for audio, wifi, ... drivers.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11440/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

MT7688 is similar tot he MT7628 but has a different wifi radio.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11439/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8031/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This is the small version of MT7620a.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8030/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Before we had a pinctrl driver we used a custom OF api. This patch converts the
soc specific pinmux data to a new set of structs. We also add some new pinmux
setings.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8009/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Print the PMU and LDO settings on boot.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/7999/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Panic() is going to add a \n itself and it's annoying if a panic message rolls
of the screen on a device with no scrollback.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Register a clock device for the SPI block of the
MT7620 SoC. The clock device will be used by the
SPI host controller driver to determine the base
clock of the controller.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5754/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The watchdog driver of the SoC uses the clk API to
get the clock associated with the watchdog device.
However the MT7620 specific setup code does not
register a clock for the watchdog device yet which
leads to the following error:

  rt2880_wdt: probe of 10000120.watchdog failed with error -2

Register a clock device for the watchdog in order to
avoid the error and make the watchdog usable.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5756/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The current code assumes that the peripheral clock always
runs at 40MHz which is not true in all configuration. The
peripheral clock can also use the reference clock instead
of the fixed 40MHz rate. If the reference clock runs at a
different rate, various peripheries are behaving incorrectly.

Additionally, the currectly calculated system clock is also
wrong. The actual value what the code computes is the rate
of the DRAM which can be different from the system clock.

Add new helper functions to get the rate of the different
clocks and use the correct values for the registered clock
devices.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5755/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Make the code print which of SDRAM, DDR1 or DDR2 was detected.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/5671/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Populate struct soc_info with the data that describes our RAM window.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5183/

Add support code for mt7620 SOC.

The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Acked-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5177/