1. 28 5月, 2016 1 次提交
    • J
      MIPS: Fix little endian microMIPS MSA encodings · 6e1b29c3
      James Hogan 提交于
      When the toolchain doesn't support MSA we encode MSA instructions
      explicitly in assembly. Unfortunately we use .word for both MIPS and
      microMIPS encodings which is wrong, since 32-bit microMIPS instructions
      are made up from a pair of halfwords.
      
      - The most significant halfword always comes first, so for little endian
        builds the halves will be emitted in the wrong order.
      
      - 32-bit alignment isn't guaranteed, so the assembler may insert a
        16-bit nop instruction to pad the instruction stream to a 32-bit
        boundary.
      
      Use the new instruction encoding macros to encode microMIPS MSA
      instructions correctly.
      
      Fixes: d96cc3d1 ("MIPS: Add microMIPS MSA support.")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paul Burton <Paul.Burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/13312/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      6e1b29c3
  2. 17 5月, 2016 1 次提交
    • M
      MIPS: MSA: Fix a link error on `_init_msa_upper' with older GCC · e49d3848
      Maciej W. Rozycki 提交于
      Fix a build regression from commit c9017757 ("MIPS: init upper 64b
      of vector registers when MSA is first used"):
      
      arch/mips/built-in.o: In function `enable_restore_fp_context':
      traps.c:(.text+0xbb90): undefined reference to `_init_msa_upper'
      traps.c:(.text+0xbb90): relocation truncated to fit: R_MIPS_26 against `_init_msa_upper'
      traps.c:(.text+0xbef0): undefined reference to `_init_msa_upper'
      traps.c:(.text+0xbef0): relocation truncated to fit: R_MIPS_26 against `_init_msa_upper'
      
      to !CONFIG_CPU_HAS_MSA configurations with older GCC versions, which are
      unable to figure out that calls to `_init_msa_upper' are indeed dead.
      Of the many ways to tackle this failure choose the approach we have
      already taken in `thread_msa_context_live'.
      
      [ralf@linux-mips.org: Drop patch segment to junk file.]
      Signed-off-by: NMaciej W. Rozycki <macro@imgtec.com>
      Cc: stable@vger.kernel.org # v3.16+
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/13271/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e49d3848
  3. 03 9月, 2015 1 次提交
  4. 02 8月, 2014 3 次提交
  5. 05 6月, 2014 1 次提交
  6. 04 6月, 2014 1 次提交
  7. 27 3月, 2014 2 次提交
    • P
      MIPS: Basic MSA context switching support · 1db1af84
      Paul Burton 提交于
      This patch adds support for context switching the MSA vector registers.
      These 128 bit vector registers are aliased with the FP registers - an
      FP register accesses the least significant bits of the vector register
      with which it is aliased (ie. the register with the same index). Due to
      both this & the requirement that the scalar FPU must be 64-bit (FR=1) if
      enabled at the same time as MSA the kernel will enable MSA & scalar FP
      at the same time for tasks which use MSA. If we restore the MSA vector
      context then we might as well enable the scalar FPU since the reason it
      was left disabled was to allow for lazy FP context restoring - but we
      just restored the FP context as it's a subset of the vector context. If
      we restore the FP context and have previously used MSA then we have to
      restore the whole vector context anyway (see comment in
      enable_restore_fp_context for details) so similarly we might as well
      enable MSA.
      
      Thus if a task does not use MSA then it will continue to behave as
      without this patch - the scalar FP context will be saved & restored as
      usual. But if a task executes an MSA instruction then it will save &
      restore the vector context forever more.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6431/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1db1af84
    • P
      MIPS: Add MSA register definitions & access · 7f65afb9
      Paul Burton 提交于
      This patch introduces definitions for the MSA control registers and
      functions which allow access to both the control & vector registers. If
      the toolchain being used to build the kernel includes support for MSA
      then this patch will make use of that support & use MSA instructions
      directly. However toolchain support for MSA is very new & far from a
      point where it can be reasonably expected that everyone building the
      kernel uses a toolchain with support. Thus fallbacks using .word
      assembler directives are also provided for now as a temporary measure.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6429/
      Patchwork: https://patchwork.linux-mips.org/patch/6607/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      7f65afb9