Add a group to the cspi pinctrl.
Signed-off-by: NJonas Andersson <jonas@microbit.se>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add support for CLAA WVGA display for i.MX53 QSB.
Signed-off-by: NRogerio Pimentel <rogerio.pimentel@freescale.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

With the commit 7f217794 (mmc: dt: Consolidate DT bindings),
the device tree properties used by various device drivers
for SD/MMC host controllers were standardized.  One of the changes
was that the property "fsl,card-wired", previously used by the
Freescale driver, was replaced with "non-removable". Fix the example
documentation regarding this.
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

There is a redundant ocotp node.  Remove it.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

There is a redundant label on usbmisc node.  Remove it.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add initial imx6sl-evk board support with uart, usdhc and fec enabled.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add SoC level device tree source for imx6sl.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Configure the data and tag latency for the L2 cache. This improves the
system performance.

This configuration is taken from Freescale's kernel patch

"ENGR00153601 [MX6]Adjust L2 cache parameter" [1]

which does

writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_TAG_LATENCY_CTRL));
writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_DATA_LATENCY_CTRL));

In this patch we are doing the same via the device tree.
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

[1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1

Since the SPI/NOR has pin conflict with the WEIM NOR,
we disable the spi/nor by default.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The SPI/NOR needs this gpio for CS.
So add this gpio in the hog pinctrl.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The SPI/NOR needs this gpio for CS.
So add this gpio in the hog pinctrl.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

add the pinctrl item for gpmi-nand.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The gpmi does not use the MX6Q_PAD_NANDF_CS2__NAND_CE2_B and
MX6Q_PAD_NANDF_CS3__NAND_CE3_B.

Just remove them.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Added SPI node and PMIC MC13783 (spi0.0) to imx27-phytec-phycore DT file.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add aliases to determine the proper SPI bus number.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds support for the Ka-Ro TX53 System-On-Module.
As a baseboard is needed to operate it, only a *.dtsi and no Makefile entry.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the uart2 pinctrl.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the uart1 pinctrl.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add pinctrl for pwm2.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the ecspi pinctrl.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the csi pinctrl.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the audmux pinctrl.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds support for the DENX M53EVK board. The board currently supports
NAND, Ethernet, UART, CAN, I2C.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

With device tree clk lookup support in place, we can move audio codec
clk lookup for ssi_ext1 into device tree now, so that imx53_qsb_init()
can be saved.

Since ssi_ext2 lookup is used nowhere, it gets removed together with
ssi_ext1 lookup from clk driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for PWM1 on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinmux for IPU LCD 1 and IPU LVDS.
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for NAND on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for different mux of I2C2 on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for different mux of I2C1 on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for different mux of CAN1 on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds pinctrl data for the AUDMUX4 on MX53.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This allows to order the i2c character devices correctly,
so that /dev/i2c-0 corresponds to i2c1, /dev/i2c-1 corresponds
to i2c2, and so on. Currently they are ordered by register
address.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>