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  1. 27 9月, 2006 3 次提交
  3. 26 9月, 2006 3 次提交
  5. 13 7月, 2006 1 次提交
    • K
      [PATCH] PCI: PCIE power management quirk · ffadcc2f
      由 Kristen Carlson Accardi 提交于 
      When changing power states from D0->DX and then from DX->D0, some
Intel PCIE chipsets will cause a device reset to occur.  This will
cause problems for any D State other than D3, since any state
information that the driver will expect to be present coming from
a D1 or D2 state will have been cleared.  This patch addes a
flag to the pci_dev structure to indicate that devices should
not use states D1 or D2, and will set that flag for the affected
chipsets.  This patch also modifies pci_set_power_state() so that
when a device driver tries to set the power state on
a device that is downstream from an affected chipset, or on one
of the affected devices it only allows state changes to or
from D0 & D3.  In addition, this patch allows the delay time
between D3->D0 to be changed via a quirk.  These chipsets also
need additional time to change states beyond the normal 10ms.
Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ffadcc2f
  7. 28 6月, 2006 1 次提交
  9. 22 6月, 2006 3 次提交
    • S
      [PATCH] PCI: disable msi mode in pci_disable_device · 99dc804d
      由 Shaohua Li 提交于 
      Brice said the pci_save_msi_state breaks his driver in his special usage
(not in suspend/resume), as pci_save_msi_state will disable msi mode. In
his usage, pci_save_state will be called at runtime, and later (after
the device operates for some time and has an error) pci_restore_state
will be called.
In another hand, suspend/resume needs disable msi mode, as device should
stop working completely. This patch try to workaround this issue.
Drivers are expected call pci_disable_device in suspend time after
pci_save_state.
Signed-off-by: NShaohua Li <shaohua.li@intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      99dc804d
    • D
      [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundation · bd8481e1
      由 Doug Thompson 提交于 
      Currently, the EDAC (error detection and correction) modules that are in
the kernel contain some features that need to be moved. After some good
feedback on the PCI Parity detection code and interface
(http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this
patch ADDs an new attribute to the pci_dev structure: Namely the
'broken_parity_status' bit.

When set this indicates that the respective hardware generates false
positives of Parity errors.

The EDAC "blacklist" solution was inferior and will be removed in a
future patch.

Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card
which generates false positive parity errors.

I am requesting comments on this AND on the possibility of a exposing
this 'broken_parity_status' bit to userland via the PCI device sysfs
directory for devices. This access would allow for enabling of this
feature on new devices and for old devices that have their drivers
updated. (SLES 9 SP3 did this on an ATI motherboard video device). There
is a need to update such a PCI attribute between kernel releases.

This patch just adds a storage place for the attribute and a quirk entry
for a known bad PCI device. PCI Parity reaper/harvestor operations are
in EDAC itself and will be refactored to use this PCI attribute instead
of its own mechanisms (which are currently disabled) in the future.
Signed-off-by: NDoug Thompson <norsk5@xmission.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bd8481e1
    • K
      [PATCH] PCI: Add pci_assign_resource_fixed -- allow fixed address assignments · 75acfeca
      由 Kumar Gala 提交于 
      PCI: Add pci_assign_resource_fixed -- allow fixed address assignments

On some embedded systems the PCI address for hotplug devices are not only
known a priori but are required to be at a given PCI address for other
master in the system to be able to access.

An example of such a system would be an FPGA which is setup from user space
after the system has booted.  The FPGA may be access by DSPs in the system
and those DSPs expect the FPGA at a fixed PCI address.

Added pci_assign_resource_fixed() as a way to allow assignment of the PCI
devices's BARs at fixed PCI addresses.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75acfeca
  11. 24 5月, 2006 1 次提交
  13. 29 4月, 2006 1 次提交
  15. 26 4月, 2006 1 次提交
  17. 15 4月, 2006 2 次提交
  19. 24 3月, 2006 3 次提交
  21. 01 2月, 2006 1 次提交
  23. 10 1月, 2006 3 次提交
  25. 11 11月, 2005 3 次提交
    • G
      [PATCH] PCI: removed unneeded .owner field from struct pci_driver · 249bb070
      由 Greg Kroah-Hartman 提交于 
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      249bb070
    • L
      [PATCH] PCI: automatically set device_driver.owner · 863b18f4
      由 Laurent riffard 提交于 
      A nice feature of sysfs is that it can create the symlink from the
driver to the module that is contained in it.

It requires that the device_driver.owner is set, what is not the
case for many PCI drivers.

This patch allows pci_register_driver to set automatically the
device_driver.owner for any PCI driver.

Credits to Al Viro who suggested the method.
Signed-off-by: NLaurent Riffard <laurent.riffard@free.fr>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
--

 drivers/ide/setup-pci.c  |   12 +++++++-----
 drivers/pci/pci-driver.c |    9 +++++----
 include/linux/ide.h      |    3 ++-
 include/linux/pci.h      |   10 ++++++++--
 4 files changed, 22 insertions(+), 12 deletions(-)
      863b18f4
    • R
      [PATCH] PCI: add pci_find_next_capability() · 24a4e377
      由 Roland Dreier 提交于 
      Some devices have more than one capability of the same type.  For
example, the PCI header for the PathScale InfiniPath looks like:

	04:01.0 InfiniBand: Unknown device 1fc1:000d (rev 02)
		Subsystem: Unknown device 1fc1:000d
		Flags: bus master, fast devsel, latency 0, IRQ 193
		Memory at fea00000 (64-bit, non-prefetchable) [size=2M]
		Capabilities: [c0] HyperTransport: Slave or Primary Interface
		Capabilities: [f8] HyperTransport: Interrupt Discovery and Configuration

There are _two_ HyperTransport capabilities, and the PathScale driver
wants to look at both of them.

The current pci_find_capability() API doesn't work for this, since it
only allows us to get to the first capability of a given type.  The
patch below introduces a new pci_find_next_capability(), which can be
used in a loop like

	for (pos = pci_find_capability(pdev, <ID>);
	     pos;
	     pos = pci_find_next_capability(pdev, pos, <ID>)) {
		/* ... */
	}
Signed-off-by: NRoland Dreier <rolandd@cisco.com>
Signed-off-by: NMatthew Wilcox <matthew@wil.cx>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      24a4e377
  27. 29 10月, 2005 1 次提交
    • B
      [PATCH] PCI: Block config access during BIST · e04b0ea2
      由 Brian King 提交于 
      Some PCI adapters (eg.  ipr scsi adapters) have an exposure today in that they
issue BIST to the adapter to reset the card.  If, during the time it takes to
complete BIST, userspace attempts to access PCI config space, the host bus
bridge will master abort the access since the ipr adapter does not respond on
the PCI bus for a brief period of time when running BIST.  On PPC64 hardware,
this master abort results in the host PCI bridge isolating that PCI device
from the rest of the system, making the device unusable until Linux is
rebooted.  This patch is an attempt to close that exposure by introducing some
blocking code in the PCI code.  When blocked, writes will be humored and reads
will return the cached value.  Ben Herrenschmidt has also mentioned that he
plans to use this in PPC power management.
Signed-off-by: NBrian King <brking@us.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

 drivers/pci/access.c    |   89 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/pci/pci-sysfs.c |   20 +++++-----
 drivers/pci/pci.h       |    7 +++
 drivers/pci/proc.c      |   28 +++++++--------
 drivers/pci/syscall.c   |   14 +++----
 include/linux/pci.h     |    7 +++
 6 files changed, 134 insertions(+), 31 deletions(-)
      e04b0ea2
  29. 10 9月, 2005 4 次提交
  31. 09 9月, 2005 7 次提交
    • B
      [PATCH] PCI/libata INTx cleanup · a04ce0ff
      由 Brett M Russ 提交于 
      Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.
Signed-off-by: NBrett Russ <russb@emc.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a04ce0ff
    • D
      [PATCH] PCI: Support PCM PM CAP version 3 · 3fe9d19f
      由 Daniel Ritz 提交于 
      - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)

- pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
  PCI_UNKNOWN

- minor cleanups
Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3fe9d19f
    • P
      [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive) · cecf4864
      由 Paul Mackerras 提交于 
      The PCI error recovery infrastructure needs to be able to contact all
the drivers affected by a PCI error event, which may mean traversing
all the devices under a given PCI-PCI bridge.  This patch adds a
function to the PCI core that traverses all the PCI devices on a PCI
bus and under any PCI-PCI bridges on that bus (and so on), calling a
given function for each device.  This provides a way for the error
recovery code to iterate through all devices that are affected by an
error event.

This version is not implemented as a recursive function.  Instead,
when we reach a PCI-PCI bridge, we set the pointers to start doing the
devices on the bus under the bridge, and when we reach the end of a
bus's devices, we use the bus->self pointer to go back up to the next
higher bus and continue doing its devices.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cecf4864
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · 064b53db
      由 John W. Linville 提交于 
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot->D0.  This leaves such
a device in an inaccessible state.  The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.

The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.

Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot.  Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot->D0 transition
will be inaccessible to their drivers.

Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification.  This is
especially true since often many devices are covered by the same
driver.  It likely would be necessary to replicate code across dozens
of drivers.

The patch below should trigger only when transitioning from D3hot->D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register.  I believe it is safe to include
this patch as part of the PCI infrastructure.

The cleanest implementation of pci_restore_bars was to call
pci_update_resource.  Unfortunately, that does not currently exist
for the sparc64 architecture.  The patch below includes a null
implemenation of pci_update_resource for sparc64.

Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      064b53db
    • G
      [PATCH] PCI: clean up pci.h and split pci register info to separate header file. · 4352dfd5
      由 Greg Kroah-Hartman 提交于 
      This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
info out to a separate file, where it belongs.  Eventually we can stop including
this file from within pci.h, but lots of code needs to be audited first.
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      4352dfd5
    • A
      [PATCH] PCI: remove CONFIG_PCI_NAMES · 982245f0
      由 Adrian Bunk 提交于 
      This patch removes CONFIG_PCI_NAMES.
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      982245f0
    • A
      [PATCH] PCI: Move PCI fixup data into r/o section · 74d863ee
      由 akpm@osdl.org 提交于 
      Make PCI fixup data const, so it'll end up in a r/o section.

This also fixes the conversion into ECOFF which gets broken by too many
changes between r/w and r/o sections.  Call it a hack but it's a change
that's correct by itself.
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      74d863ee
  33. 17 8月, 2005 1 次提交
  35. 09 8月, 2005 1 次提交