1. 07 7月, 2016 1 次提交
  2. 05 7月, 2016 1 次提交
  3. 21 6月, 2016 1 次提交
    • S
      arm64: Kconfig: select PM{,_GENERIC_DOMAINS} for ARCH_VEXPRESS · 8da7cc08
      Sudeep Holla 提交于
      The Linux AMBA bus framework probes the peripheral IDs when adding the
      AMBA devices very early on the boot. Generally they are on APB bus and
      just require APB clocks to be on even when most of the core logic of the
      IP is powered down.
      
      However on Juno, the entire debugsys domain needs to be ON to access
      even the coresight components' CID/PID registers and hence broken by
      design. Accessing those while debugsys power domain is off will lead to
      the bridge stalling the transactions instead of returning the slave error.
      
      Further, the AMBA framework can't deal with !CONFIG_PM_GENERIC_DOMAINS
      case: it ignores the error and proceeds to access the device region.
      It was suggested to always enable CONFIG_PM{,_GENERIC_DOMAINS} in order
      to handle above explained scenario.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Suggested-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      8da7cc08
  4. 16 6月, 2016 1 次提交
  5. 02 6月, 2016 1 次提交
  6. 01 6月, 2016 1 次提交
  7. 30 5月, 2016 1 次提交
  8. 11 5月, 2016 1 次提交
    • S
      arm64/sunxi: 4.6-rc1: Add dependency on generic irq chip · 23485482
      Suzuki K Poulose 提交于
      Commit ce3dd55b ("arm64: Introduce Allwinner SoC config option"),
      added support for ARCH_SUNXI on arm64, but failed to select
      GENERIC_IRQ_CHIP, which is required for drivers/irqchip/irq-sunxi-nmi.c
      and causes build failures like :
      
        UPD     include/generated/compile.h
        CC      init/version.o
        LD      init/built-in.o
      drivers/built-in.o: In function `sunxi_sc_nmi_set_type':
      drivers/irqchip/irq-sunxi-nmi.c:114: undefined reference to `irq_setup_alt_chip'
      drivers/built-in.o: In function `irq_domain_add_linear':
      include/linux/irqdomain.h:253: undefined reference to `irq_generic_chip_ops'
      include/linux/irqdomain.h:253: undefined reference to `irq_generic_chip_ops'
      drivers/built-in.o: In function `sunxi_sc_nmi_irq_init':
      drivers/irqchip/irq-sunxi-nmi.c:146: undefined reference to `irq_alloc_domain_generic_chips'
      drivers/irqchip/irq-sunxi-nmi.c:161: undefined reference to `irq_get_domain_generic_chip'
      drivers/irqchip/irq-sunxi-nmi.c:170: undefined reference to `irq_gc_mask_clr_bit'
      drivers/irqchip/irq-sunxi-nmi.c:171: undefined reference to `irq_gc_mask_set_bit'
      drivers/irqchip/irq-sunxi-nmi.c:172: undefined reference to `irq_gc_ack_set_bit'
      drivers/irqchip/irq-sunxi-nmi.c:170: undefined reference to `irq_gc_mask_clr_bit'
      
      Fixes: commit ce3dd55b ("arm64: Introduce Allwinner SoC config option")
      Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      23485482
  9. 26 4月, 2016 2 次提交
  10. 14 4月, 2016 1 次提交
  11. 23 3月, 2016 1 次提交
  12. 07 3月, 2016 1 次提交
  13. 27 2月, 2016 2 次提交
  14. 23 2月, 2016 1 次提交
  15. 21 2月, 2016 1 次提交
    • Z
      arm64: Broadcom Vulcan support · 5bfb3889
      Zi Shen Lim 提交于
      Add a configuration option and a device tree for Broadcom's Vulcan
      ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
      controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
      vulcan-eval.dts has definitions for a basic evaluation board.
      
      Vulcan's processor cores support the ARMv8.1 instruction set and
      will use "brcm,vulcan" as the compatible property. The firmware
      has PSCI 0.2 support for cpu wakeup.
      Signed-off-by: NZi Shen Lim <zlim@broadcom.com>
      [ updated and split dts - jchandra@broadcom.com ]
      Signed-off-by: NJayachandran C <jchandra@broadcom.com>
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      5bfb3889
  16. 19 2月, 2016 3 次提交
  17. 17 2月, 2016 1 次提交
  18. 13 2月, 2016 1 次提交
  19. 25 1月, 2016 2 次提交
  20. 18 12月, 2015 1 次提交
  21. 12 12月, 2015 1 次提交
  22. 24 11月, 2015 1 次提交
  23. 20 11月, 2015 1 次提交
  24. 17 11月, 2015 1 次提交
  25. 24 10月, 2015 1 次提交
  26. 06 10月, 2015 1 次提交
  27. 21 9月, 2015 1 次提交
  28. 06 8月, 2015 1 次提交
  29. 30 7月, 2015 1 次提交
  30. 18 7月, 2015 2 次提交