1. 23 11月, 2014 3 次提交
  2. 16 9月, 2014 2 次提交
  3. 18 7月, 2014 2 次提交
  4. 23 5月, 2014 1 次提交
  5. 16 5月, 2014 1 次提交
  6. 30 4月, 2014 1 次提交
  7. 14 4月, 2014 2 次提交
  8. 27 2月, 2014 1 次提交
  9. 24 2月, 2014 1 次提交
    • F
      ARM: dts: vf610-twr: Add ADC support · 64436ff6
      Fugang Duan 提交于
      vf610 has two ADC controllers, and vf610-twr board ADC0_SE5 pin connect
      to sliding rheostat for ADC test, other ADC pins connect to connectors for
      future use.
      
      Add support for ADC0_SE5.
      
      CC: Jonathan Cameron <jic23@kernel.org>
      CC: Mark Rutland <mark.rutland@arm.com>
      CC: Otavio Salvador <otavio@ossystems.com.br>
      CC: Peter Meerwald <pmeerw@pmeerw.net>
      CC: Lars-Peter Clausen <lars@metafoo.de>
      Signed-off-by: NFugang Duan <B38611@freescale.com>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      64436ff6
  10. 20 2月, 2014 1 次提交
  11. 18 2月, 2014 2 次提交
  12. 09 2月, 2014 2 次提交
    • H
      ARM: dts: vf610: use the interrupt macros · 2bc88b1b
      Huang Shijie 提交于
      This patch uses the IRQ_TYPE_LEVEL_HIGH/IRQ_TYPE_NONE to replace
      the hardcode.
      
      [shawn.guo: While at it, we also fix the typo in uart0 interrupts
      property, where the 0x00 should 0x04.  Hense, it should also be
      IRQ_TYPE_LEVEL_HIGH just like other UART instances.]
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      2bc88b1b
    • S
      ARM: dts: vf610: make pinctrl nodes board specific · 07ed1eed
      Shawn Guo 提交于
      Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
      boards that share the same pinctrl setting do not have to define it time
      and time again in <board>.dts.  However, along with the devices and use
      cases being added continuously, the pinctrl setting nodes under iomuxc
      becomes more than expected.  This bloats device tree blob for particular
      board unnecessarily since only a small subset of those pinctrl setting
      nodes will be used by the board.  It impacts not only the DTB file size
      but also the run-time device tree lookup efficiency.
      
      The patch moves all the pinctrl data into individual boards as needed.
      With the changes, the pinctrl setting nodes becomes local to particular
      board, and it makes no sense to continue numbering the setting for
      given peripheral.  Thus, all the pinctrl phandler name gets updated to
      have only peripheral name in there.
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      Acked-by: NFugang Duan <B38611@freescale.com>
      07ed1eed
  13. 26 9月, 2013 1 次提交
  14. 15 7月, 2013 1 次提交
    • S
      ARM: imx: fix vf610 enet module clock selection · 4f71612e
      Shawn Guo 提交于
      The fec/enet driver calculates MDC rate with the formula below.
      
        ref_freq / ((MII_SPEED + 1) x 2)
      
      The ref_freq here is the fec internal module clock, which is missing
      from clk-vf610 clock driver right now.  And clk-vf610 driver mistakenly
      supplies RMII clock (50 MHz) as the source to fec.  This results in the
      situation that fec driver gets ref_freq as 50 MHz, while physically it
      runs at 66 MHz (fec module clock physically sources from ipg which runs
      at 66 MHz).  That's why software expects MDC runs at 2.5 MHz, while the
      measurement tells it runs at 3.3 MHz.  And this causes the PHY KSZ8041
      keeps swithing between Full and Half mode as below.
      
        libphy: 400d0000.etherne:00 - Link is Up - 100/Full
        libphy: 400d0000.etherne:00 - Link is Up - 100/Half
        libphy: 400d0000.etherne:00 - Link is Up - 100/Full
        libphy: 400d0000.etherne:00 - Link is Up - 100/Half
        libphy: 400d0000.etherne:00 - Link is Up - 100/Full
        libphy: 400d0000.etherne:00 - Link is Up - 100/Half
      
      Add the missing module clock for ENET0 and ENET1, and correct the clock
      supplying in device tree to fix above issue.
      
      Thanks to Alison Wang <b18965@freescale.com> for debugging the issue.
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      4f71612e
  15. 17 6月, 2013 2 次提交