1. 06 6月, 2014 1 次提交
  2. 14 2月, 2014 1 次提交
  3. 08 11月, 2013 1 次提交
  4. 11 6月, 2013 1 次提交
  5. 01 6月, 2013 1 次提交
  6. 16 4月, 2013 1 次提交
  7. 14 2月, 2013 1 次提交
  8. 19 10月, 2012 1 次提交
  9. 31 8月, 2012 1 次提交
  10. 28 6月, 2012 1 次提交
  11. 08 5月, 2012 2 次提交
    • D
      netdev/of/phy: Add MDIO bus multiplexer driven by GPIO lines. · 416912a1
      David Daney 提交于
      The GPIO pins select which sub bus is connected to the master.
      
      Initially tested with an sn74cbtlv3253 switch device wired into the
      MDIO bus.
      Signed-off-by: NDavid Daney <david.daney@cavium.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      416912a1
    • D
      netdev/of/phy: Add MDIO bus multiplexer support. · 0ca2997d
      David Daney 提交于
      This patch adds a somewhat generic framework for MDIO bus
      multiplexers.  It is modeled on the I2C multiplexer.
      
      The multiplexer is needed if there are multiple PHYs with the same
      address connected to the same MDIO bus adepter, or if there is
      insufficient electrical drive capability for all the connected PHY
      devices.
      
      Conceptually it could look something like this:
      
                         ------------------
                         | Control Signal |
                         --------+---------
                                 |
       ---------------   --------+------
       | MDIO MASTER |---| Multiplexer |
       ---------------   --+-------+----
                           |       |
                           C       C
                           h       h
                           i       i
                           l       l
                           d       d
                           |       |
           ---------       A       B   ---------
           |       |       |       |   |       |
           | PHY@1 +-------+       +---+ PHY@1 |
           |       |       |       |   |       |
           ---------       |       |   ---------
           ---------       |       |   ---------
           |       |       |       |   |       |
           | PHY@2 +-------+       +---+ PHY@2 |
           |       |                   |       |
           ---------                   ---------
      
      This framework configures the bus topology from device tree data.  The
      mechanics of switching the multiplexer is left to device specific
      drivers.
      
      The follow-on patch contains a multiplexer driven by GPIO lines.
      Signed-off-by: NDavid Daney <david.daney@cavium.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0ca2997d
  12. 20 3月, 2012 1 次提交
  13. 20 12月, 2011 1 次提交
  14. 27 11月, 2011 1 次提交
  15. 27 8月, 2011 1 次提交
    • J
      drivers/net: Kconfig & Makefile cleanup · 88491d81
      Jeff Kirsher 提交于
      The is does a general cleanup of the drivers/net/ Kconfig and
      Makefile.  This patch create a "core" option and places all
      the networking core drivers into this option (default is yes
      for this option).  In addition, it alphabitizes the Kconfig
      driver options.
      
      As a side cleanup, found that the arcnet, token ring, and PHY
      Kconfig options were a tri-state option and should have been
      a bool option.
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      88491d81
  16. 17 6月, 2011 1 次提交
  17. 12 2月, 2011 1 次提交
  18. 11 12月, 2010 1 次提交
  19. 05 10月, 2010 1 次提交
  20. 12 8月, 2010 1 次提交
    • R
      phylib: available for any speed ethernet · cba86f2e
      Randy Dunlap 提交于
      Several gigabit network drivers (SB1250_MAC, TIGON3, FSL, GIANFAR,
      UCC_GETH, MV643XX_ETH, XILINX_LL_TEMAC, S6GMAC, STMMAC_ETH, PASEMI_MAC,
      and OCTEON_ETHERNET) select PHYLIB.  These drivers are not under
      NET_ETHERNET (10/100 mbit), so this warning is generated (long, irrelevant
      parts are omitted):
      
      warning: (NET_DSA && NET && EXPERIMENTAL && NET_ETHERNET && !S390 || ... || SB1250_MAC && NETDEVICES && NETDEV_1000 && SIBYTE_SB1xxx_SOC || TIGON3 && NETDEVICES && NETDEV_1000 && PCI || FSL_PQ_MDIO && NETDEVICES && NETDEV_1000 && FSL_SOC || GIANFAR && NETDEVICES && NETDEV_1000 && FSL_SOC || UCC_GETH && NETDEVICES && NETDEV_1000 && QUICC_ENGINE || MV643XX_ETH && NETDEVICES && NETDEV_1000 && (MV64X60 || PPC32 || PLAT_ORION) || XILINX_LL_TEMAC && NETDEVICES && NETDEV_1000 && (PPC || MICROBLAZE) || S6GMAC && NETDEVICES && NETDEV_1000 && XTENSA_VARIANT_S6000 || STMMAC_ETH && NETDEV_1000 && NETDEVICES && CPU_SUBTYPE_ST40 || PASEMI_MAC && NETDEVICES && NETDEV_10000 && PPC_PASEMI && PCI || OCTEON_ETHERNET && STAGING && !STAGING_EXCLUDE_BUILD && CPU_CAVIUM_OCTEON) selects PHYLIB which has unmet direct dependencies (!S390 && NET_ETHERNET)
      
      PHYLIB is used by non-10/100 mbit ethernet drivers, so change the dependencies
      to be NETDEVICES instead of NET_ETHERNET.
      Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cba86f2e
  21. 04 5月, 2010 1 次提交
  22. 17 12月, 2009 1 次提交
    • D
      NET: Add driver for Octeon MDIO buses. · 25d967b7
      David Daney 提交于
      The Octeon SOC has two types of Ethernet ports, each type with its own
      driver.  However, the PHYs for all the ports are controlled by a
      common MDIO bus.  Because the mdio driver is not associated with a
      particular driver, but is instead a system level resource, we create s
      stand-alone driver for it.
      
      As for the driver, we put the register definitions in
      arch/mips/include/asm/octeon where most of the other Octeon register
      definitions live.  This is a platform driver with the platform device
      for "mdio-octeon" being registered in the platform startup code.
      Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
      Acked-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      25d967b7
  23. 08 7月, 2009 1 次提交
  24. 10 12月, 2008 1 次提交
  25. 29 11月, 2008 2 次提交
  26. 17 11月, 2008 2 次提交
  27. 31 5月, 2008 1 次提交
  28. 22 5月, 2008 2 次提交
  29. 29 4月, 2008 1 次提交
  30. 05 3月, 2008 1 次提交
  31. 03 2月, 2008 1 次提交
  32. 24 1月, 2008 1 次提交
  33. 11 10月, 2007 2 次提交
    • S
      Generic bitbanged MDIO library · e2ec4581
      Scott Wood 提交于
      Previously, bitbanged MDIO was only supported in individual
      hardware-specific drivers.  This code factors out the higher level
      protocol implementation, reducing the hardware-specific portion to
      functions setting direction, data, and clock.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      e2ec4581
    • V
      PHY fixed driver: rework release path and update phy_id notation · 7c32f470
      Vitaly Bordug 提交于
      device_bind_driver() error code returning has been fixed.  release()
      function has been written, so that to free resources in correct way; the
      release path is now clean.
      
      Before the rework, it used to cause
       Device 'fixed@100:1' does not have a release() function, it is broken
       and must be fixed.
       BUG: at drivers/base/core.c:104 device_release()
      
       Call Trace:
        [<ffffffff802ec380>] kobject_cleanup+0x53/0x7e
        [<ffffffff802ec3ab>] kobject_release+0x0/0x9
        [<ffffffff802ecf3f>] kref_put+0x74/0x81
        [<ffffffff8035493b>] fixed_mdio_register_device+0x230/0x265
        [<ffffffff80564d31>] fixed_init+0x1f/0x35
        [<ffffffff802071a4>] init+0x147/0x2fb
        [<ffffffff80223b6e>] schedule_tail+0x36/0x92
        [<ffffffff8020a678>] child_rip+0xa/0x12
        [<ffffffff80311714>] acpi_ds_init_one_object+0x0/0x83
        [<ffffffff8020705d>] init+0x0/0x2fb
        [<ffffffff8020a66e>] child_rip+0x0/0x12
      
      Also changed the notation of the fixed phy definition on
      mdio bus to the form of <speed>+<duplex> to make it able to be used by
      gianfar and ucc_geth that define phy_id strictly as "%d:%d" and cleaned up
      the whitespace issues.
      Signed-off-by: NVitaly Bordug <vitb@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      7c32f470
  34. 09 7月, 2007 1 次提交
  35. 12 5月, 2007 1 次提交