1. 04 8月, 2009 1 次提交
    • T
      x86, percpu: Fix DECLARE/DEFINE_PER_CPU_PAGE_ALIGNED() · 3e352aa8
      Tejun Heo 提交于
      DECLARE/DEFINE_PER_CPU_PAGE_ALIGNED() put percpu variables in
      .page_aligned section without adding any alignment restrictions.
      Currently, this doesn't cause any problem because all users of the
      macros have explicit page alignment and page-sized but it's much safer
      to enforce page alignment from the macros.  After all, it's what they
      claim to do.
      
      Add __aligned(PAGE_SIZE) to DECLARE/DEFINE_PER_CPU_PAGE_ALIGNED() and
      drop explicit alignment from it users.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      3e352aa8
  2. 28 6月, 2009 1 次提交
    • H
      Revert "x86: cap iomem_resource to addressable physical memory" · ff8a4bae
      H. Peter Anvin 提交于
      This reverts commit 95ee14e4.
      Mikael Petterson <mikepe@it.uu.se> reported that at least one of his
      systems will not boot as a result.  We have ruled out the detection
      algorithm malfunctioning, so it is not a matter of producing the
      incorrect bitmasks; rather, something in the application of them
      fails.
      
      Revert the commit until we can root cause and correct this problem.
      
      -stable team: this means the underlying commit should be rejected.
      Reported-and-isolated-by: NMikael Petterson <mikpe@it.uu.se>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      LKML-Reference: <200906261559.n5QFxJH8027336@pilspetsen.it.uu.se>
      Cc: stable@kernel.org
      Cc: Grant Grundler <grundler@parisc-linux.org>
      ff8a4bae
  3. 18 6月, 2009 1 次提交
    • A
      i386: fix/simplify espfix stack switching, move it into assembly · dc4c2a0a
      Alexander van Heukelum 提交于
      The espfix code triggers if we have a protected mode userspace
      application with a 16-bit stack. On returning to userspace, with iret,
      the CPU doesn't restore the high word of the stack pointer. This is an
      "official" bug, and the work-around used in the kernel is to temporarily
      switch to a 32-bit stack segment/pointer pair where the high word of the
      pointer is equal to the high word of the userspace stackpointer.
      
      The current implementation uses THREAD_SIZE to determine the cut-off,
      but there is no good reason not to use the more natural 64kb... However,
      implementing this by simply substituting THREAD_SIZE with 65536 in
      patch_espfix_desc crashed the test application. patch_espfix_desc tries
      to do what is described above, but gets it subtly wrong if the userspace
      stack pointer is just below a multiple of THREAD_SIZE: an overflow
      occurs to bit 13... With a bit of luck, when the kernelspace
      stackpointer is just below a 64kb-boundary, the overflow then ripples
      trough to bit 16 and userspace will see its stack pointer changed by
      65536.
      
      This patch moves all espfix code into entry_32.S. Selecting a 16-bit
      cut-off simplifies the code. The game with changing the limit dynamically
      is removed too. It complicates matters and I see no value in it. Changing
      only the top 16-bit word of ESP is one instruction and it also implies
      that only two bytes of the ESPFIX GDT entry need to be changed and this
      can be implemented in just a handful simple to understand instructions.
      As a side effect, the operation to compute the original ESP from the
      ESPFIX ESP and the GDT entry simplifies a bit too, and the remaining
      three instructions have been expanded inline in entry_32.S.
      
      impact: can now reliably run userspace with ESP=xxxxfffc on 16-bit
      stack segment
      Signed-off-by: NAlexander van Heukelum <heukelum@fastmail.fm>
      Acked-by: NStas Sergeev <stsp@aknet.ru>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      dc4c2a0a
  4. 17 6月, 2009 2 次提交
  5. 23 5月, 2009 1 次提交
  6. 18 5月, 2009 1 次提交
  7. 11 5月, 2009 1 次提交
    • Y
      x86: clean up and fix setup_clear/force_cpu_cap handling · 3e0c3737
      Yinghai Lu 提交于
      setup_force_cpu_cap() only have one user (Xen guest code),
      but it should not reuse cleared_cpu_cpus, otherwise it
      will have problems on SMP.
      
      Need to have a separate cpu_cpus_set array too, for forced-on
      flags, beyond the forced-off flags.
      
      Also need to setup handling before all cpus caps are combined.
      
      [ Impact: fix the forced-set CPU feature flag logic ]
      
      Cc: H. Peter Anvin <hpa@linux.intel.com>
      Cc: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Signed-off-by: NYinghai Lu <yinghai.lu@kernel.org>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3e0c3737
  8. 02 5月, 2009 1 次提交
  9. 18 3月, 2009 1 次提交
    • R
      cpumask: fix CONFIG_CPUMASK_OFFSTACK=y cpu hotunplug crash · 30e1e6d1
      Rusty Russell 提交于
      Impact: Fix cpu offline when CONFIG_MAXSMP=y
      
      Changeset bc9b83dd "cpumask: convert
      c1e_mask in arch/x86/kernel/process.c to cpumask_var_t" contained a
      bug: c1e_mask is manipulated even if C1E isn't detected (and hence
      not allocated).
      
      This is simply fixed by checking for NULL (which gcc optimizes out
      anyway of CONFIG_CPUMASK_OFFSTACK=n, since it knows ce1_mask can never
      be NULL).
      
      In addition, fix a leak where select_idle_routine re-allocates
      (and re-clears) c1e_mask on every cpu init.
      Reported-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Cc: Mike Travis <travis@sgi.com>
      LKML-Reference: <200903171450.34549.rusty@rustcorp.com.au>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      30e1e6d1
  10. 14 3月, 2009 2 次提交
  11. 13 3月, 2009 2 次提交
  12. 12 3月, 2009 1 次提交
  13. 10 3月, 2009 1 次提交
  14. 18 2月, 2009 2 次提交
  15. 17 2月, 2009 1 次提交
  16. 15 2月, 2009 1 次提交
    • Y
      x86: fix typo in filter_cpuid_features() · f6db44df
      Yinghai Lu 提交于
      Impact: fix wrong disabling of cpu features
      
      an amd system got this strange output:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
      
      but in /proc/cpuinfo I have:
      
       cpuid level	: 5
      
      on intel system:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
       CPU: CPU feature dca disabled due to lack of CPUID level 0x9
      
      but in /proc/cpuinfo i have:
      
       cpuid level     : 11
      
      Tt turns out there is a typo, and we should use level member in df.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f6db44df
  17. 10 2月, 2009 1 次提交
    • T
      x86: implement x86_32 stack protector · 60a5317f
      Tejun Heo 提交于
      Impact: stack protector for x86_32
      
      Implement stack protector for x86_32.  GDT entry 28 is used for it.
      It's set to point to stack_canary-20 and have the length of 24 bytes.
      CONFIG_CC_STACKPROTECTOR turns off CONFIG_X86_32_LAZY_GS and sets %gs
      to the stack canary segment on entry.  As %gs is otherwise unused by
      the kernel, the canary can be anywhere.  It's defined as a percpu
      variable.
      
      x86_32 exception handlers take register frame on stack directly as
      struct pt_regs.  With -fstack-protector turned on, gcc copies the
      whole structure after the stack canary and (of course) doesn't copy
      back on return thus losing all changed.  For now, -fno-stack-protector
      is added to all files which contain those functions.  We definitely
      need something better.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      60a5317f
  18. 09 2月, 2009 1 次提交
  19. 31 1月, 2009 2 次提交
  20. 29 1月, 2009 3 次提交
  21. 28 1月, 2009 1 次提交
  22. 27 1月, 2009 2 次提交
  23. 24 1月, 2009 2 次提交
    • H
      x86: filter CPU features dependent on unavailable CPUID levels · b38b0665
      H. Peter Anvin 提交于
      Impact: Fixes potential crashes on misconfigured systems.
      
      Some CPU features require specific CPUID levels to be available in
      order to function, as they contain information about the operation of
      a specific feature.  However, some BIOSes and virtualization software
      provide the ability to mask CPUID levels in order to support legacy
      operating systems.  We try to enable such CPUID levels when we know
      how to do it, but for the remaining cases, filter out such CPU
      features when there is no way for us to support them.
      
      Do this in one place, in the CPUID code, with a table-driven approach.
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      b38b0665
    • H
      x86: handle PAT more like other CPU features · 75a04811
      H. Peter Anvin 提交于
      Impact: Cleanup
      
      When PAT was originally introduced, it was handled specially for a few
      reasons:
      
      - PAT bugs are hard to track down, so we wanted to maintain a
        whitelist of CPUs.
      - The i386 and x86-64 CPUID code was not yet unified.
      
      Both of these are now obsolete, so handle PAT like any other features,
      including ordinary feature blacklisting due to known bugs.
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      75a04811
  24. 21 1月, 2009 3 次提交
    • T
      x86: uv cleanup · bdbcdd48
      Tejun Heo 提交于
      Impact: cleanup
      
      Make the following uv related cleanups.
      
      * collect visible uv related definitions and interfaces into uv/uv.h
        and use it.  this cleans up the messy situation where on 64bit, uv
        is defined properly, on 32bit generic it's dummy and on the rest
        undefined.  after this clean up, uv is defined on 64 and dummy on
        32.
      
      * update uv_flush_tlb_others() such that it takes cpumask of
        to-be-flushed cpus as argument, instead of that minus self, and
        returns yet-to-be-flushed cpumask, instead of modifying the passed
        in parameter.  this interface change will ease dummy implementation
        of uv_flush_tlb_others() and makes uv tlb flush related stuff
        defined in tlb_uv proper.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      bdbcdd48
    • B
      x86: set %fs to __KERNEL_PERCPU unconditionally for x86_32 · 0dd76d73
      Brian Gerst 提交于
      Impact: cleanup
      
      %fs is currently set to __KERNEL_DS at boot, and conditionally
      switched to __KERNEL_PERCPU for secondary cpus.  Instead, initialize
      GDT_ENTRY_PERCPU to the same attributes as GDT_ENTRY_KERNEL_DS and
      set %fs to __KERNEL_PERCPU unconditionally.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      0dd76d73
    • B
      x86: clean up gdt_page definition · 06deef89
      Brian Gerst 提交于
      Impact: cleanup && more compact percpu area layout with future changes
      
      Move 64-bit GDT to page-aligned section and clean up comment
      formatting.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      06deef89
  25. 20 1月, 2009 3 次提交
  26. 18 1月, 2009 2 次提交