- 30 7月, 2017 1 次提交
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由 Hanjun Guo 提交于
ACPI HID for Hisilicon Hip07/08 should be HISI02A1/2, not HISI0A21/2, HISI02A1/2 was tested ok but was modified by the stupid typo when upstream the patches (by me), correct them to the right IDs (matching the IDs in drivers/i2c/busses/i2c-designware-platdrv.c). Fixes: 6e14cf36 (ACPI / APD: Add clock frequency for Hisilicon Hip07/08 I2C controller) Reported-by: NTao Tian <tiantao6@huawei.com> Signed-off-by: NHanjun Guo <hanjun.guo@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 27 4月, 2017 1 次提交
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由 Hanjun Guo 提交于
I2C clock frequency of Designware ip for Hisilicon Hip07 is 200M, but 250M for Hip08, use two ACPI IDs to differentiate them. Signed-off-by: NHanjun Guo <hanjun.guo@linaro.org> Reviewed-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 14 3月, 2017 1 次提交
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由 Jayachandran C 提交于
ARCH_VULCAN arm64 platform (for Broadcom Vulcan ARM64 processors) has been discontinued. Cavium's ThunderX2 CN99XX (ARCH_THUNDER2) will be the next revision of the platform. Update compile dependencies and ACPI ID to reflect this change. There is not need to retain ARCH_VULCAN since the Vulcan processor was never in production and ARCH_VULCAN will be deleted soon. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 10 11月, 2016 1 次提交
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由 Heikki Krogerus 提交于
We have a couple of drivers, acpi_apd.c and acpi_lpss.c, that need to pass extra build-in properties to the devices they create. Previously the drivers added those properties to the struct device which is member of the struct acpi_device, but that does not work. Those properties need to be assigned to the struct device of the platform device instead in order for them to become available to the drivers. To fix this, this patch changes acpi_create_platform_device function to take struct property_entry pointer as parameter. Fixes: 20a875e2 (serial: 8250_dw: Add quirk for APM X-Gene SoC) Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Tested-by: NYazen Ghannam <yazen.ghannam@amd.com> Tested-by: NJérôme de Bretagne <jerome.debretagne@gmail.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 24 10月, 2016 1 次提交
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由 Nehal Shah 提交于
This patch supports 150 Mhz i2c clock frequency for Designware ip of future AMD I2C controller. Reviewed-by: NS-k, Shyam-sundar <Shyam-sundar.S-k@amd.com> Signed-off-by: NShah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 13 9月, 2016 1 次提交
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由 Julia Lawall 提交于
For structure types defined in the same file or local header files, find top-level static structure declarations that have the following properties: 1. Never reassigned. 2. Address never taken 3. Not passed to a top-level macro call 4. No pointer or array-typed field passed to a function or stored in a variable. Declare structures having all of these properties as const. Done using Coccinelle. Based on a suggestion by Joe Perches <joe@perches.com>. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 31 8月, 2016 1 次提交
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由 Heikki Krogerus 提交于
The UART driver, dw8250.c, needs some details regarding the Designware UART. For ACPI enumerated devices the values are hard-coded, but since the driver also reads the values from device properties, providing them with build-in properties. This allows us to later remove the hard-coded values from the driver. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 17 8月, 2016 1 次提交
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由 Kamlakant Patel 提交于
Add device HID for SPI controller on Broadcom Vulcan ARM64. The default frequency for SPI on Vulcan is 133MHz. Signed-off-by: NKamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 28 4月, 2016 1 次提交
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由 Stephen Boyd 提交于
This flag is a no-op now (see commit 47b0eeb3 "clk: Deprecate CLK_IS_ROOT", 2016-02-02) so remove it. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 17 3月, 2016 1 次提交
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由 Wang Hongcheng 提交于
Add device HID AMDI0020 to match the AMD ACPI Vendor ID (AMDI) as registered in http://www.uefi.org/acpi_id_list, and the UART controller on future AMD paltform will use the HID instead of AMD0020. Signed-off-by: NWang Hongcheng <annie.wang@amd.com> Acked-by: NKen Xue <Ken.Xue@amd.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 11 3月, 2016 1 次提交
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由 Xiangliang Yu 提交于
Add device HID AMDI0010 to match the AMD ACPI Vendor ID (AMDI) that was registered in http://www.uefi.org/acpi_id_list, and the I2C controller on future AMD paltform will use the HID instead of AMD0010. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 07 1月, 2016 1 次提交
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由 Loc Ho 提交于
Add APM X-Gene ACPI I2C device support by hooks into existent ACPI APD driver. To fully enable support, require another patch to add the X-Gene ACPI node into the DW I2C driver. Signed-off-by: NLoc Ho <lho@apm.com> Reviewed-by: NKen Xue <Ken.Xue@amd.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 21 7月, 2015 1 次提交
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由 Stephen Boyd 提交于
Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Remove the includes here because these are a provider drivers. Cc: Ken Xue <Ken.Xue@amd.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 06 2月, 2015 1 次提交
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由 Ken Xue 提交于
This new feature is to interpret AMD specific ACPI device to platform device such as I2C, UART, GPIO found on AMD CZ and later chipsets. It based on example intel LPSS. Now, it can support AMD I2C, UART and GPIO. Signed-off-by: NKen Xue <Ken.Xue@amd.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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