1. 05 5月, 2014 25 次提交
  2. 25 4月, 2014 2 次提交
  3. 24 4月, 2014 2 次提交
  4. 23 4月, 2014 4 次提交
    • D
      drm: pass the irq explicitly to drm_irq_install · bb0f1b5c
      Daniel Vetter 提交于
      Unfortunately this requires a drm-wide change, and I didn't see a sane
      way around that. Luckily it's fairly simple, we just need to inline
      the respective get_irq implementation from either drm_pci.c or
      drm_platform.c.
      
      With that we can now also remove drm_dev_to_irq from drm_irq.c.
      Reviewed-by: NThierry Reding <treding@nvidia.com>
      Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bb0f1b5c
    • D
      drm: Rip out totally bogus vga_switcheroo->can_switch locking · fc8fd40e
      Daniel Vetter 提交于
      So I just wanted to add a new field to struct drm_device and
      accidentally stumbled over something. According to comments
      dev->open_count is protected by dev->count_lock, but that's totally
      not the case. It's protected by drm_global_mutex.
      
      Unfortunately the vga switcheroo callbacks took this comment at face
      value. The problem is that we can't just take the drm_global_mutex
      because:
      - It would lead to a locking inversion with the driver load/unload
        paths.
      - It wouldn't actually protect anything, for that we'd need to wrap
        the entire vga switcheroo code in the drm_global_mutex. And I'm not
        sure whether that would actually solve anything.
      
      What we probably want is a try_to_grab_switcheroo reference kind of
      thing which is used in the driver's ->open callback. Then we could
      move all that ->can_switch madness into the vga switcheroo core where
      it really belongs.
      
      But since that would amount to real work take the easy way out and
      just add a comment. It's definitely not going to make anything worse
      since doing switcheroo state changes while restarting X just isn't
      recommended. Even though the delayed switching code does exactly that.
      
      v2:
      - Simplify the ->can_switch implementations more (Thierry)
      - Fix comment about the dev->open_count locking (Thierry)
      
      Cc: Thierry Reding <treding@nvidia.com>
      Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> (v1)
      Reviewed-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      fc8fd40e
    • P
      drm/i915: get power domain in case the BIOS enabled eDP VDD · 63635217
      Paulo Zanoni 提交于
      If I unplug the eDP monitor, the BIOS of my machine will enable the
      VDD bit, then when the driver loads it will think VDD is enabled. It
      will detect that the eDP is not enabled and return false from
      intel_edp_init_connector. This will trigger a call to
      edp_panel_vdd_off_sync(), which trigger a WARN saying that the
      refcount of the power domain is less than zero.
      
      The problem happens because the driver gets a refcount whenever it
      enables the VDD bit, and puts the refcount whenever it disables the
      VDD bit. But on this case, the BIOS enabled VDD, so all we do is to
      call put() without calling get() first, so the code added is there to
      make sure we always have the get() in case the BIOS enabled the bit.
      
      This regression was introduced in
      commit e9cb81a2
      Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Date:   Thu Nov 21 13:47:23 2013 -0200
      
          drm/i915: get a runtime PM reference when the panel VDD is on
      
      v2: - Rebase
      
      Tested-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Cc: stable@vger.kernel.org (v3.13+)
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      63635217
    • D
      drm/i915: Don't check gmch state on inherited configs · 9953599b
      Daniel Vetter 提交于
      ... our current modeset code isn't good enough yet to handle this. The
      scenario is:
      
      1. BIOS sets up a cloned config with lvds+external screen on the same
      pipe, e.g. pipe B.
      
      2. We read out that state for pipe B and assign the gmch_pfit state to
      it.
      
      3. The initial modeset switches the lvds to pipe A but due to lack of
      atomic modeset we don't recompute the config of pipe B.
      
      -> both pipes now claim (in the sw pipe config structure) to use the
      gmch_pfit, which just won't work.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74081Tested-by: Nmax <manikulin@gmail.com>
      Cc: Alan Stern <stern@rowland.harvard.edu>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      9953599b
  5. 22 4月, 2014 2 次提交
    • V
      drm/i915: Allow user modes to exceed DVI 165MHz limit · 40478455
      Ville Syrjälä 提交于
      In commit
       commit 6375b768
       Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
       Date:   Mon Mar 3 11:33:36 2014 +0200
      
          drm/i915: Reject >165MHz modes w/ DVI monitors
      
      the driver started to filter out display modes which exceed the
      single-link DVI 165Mz dotclock limits when the monitor doesn't report
      itself as being HDMI compliant. The intent was to filter out all
      EDID derived modes that require dual-link DVI to operate since we
      don't support dual-link.
      
      However the patch went a bit too far and also causes the driver to reject
      such modes even when specified by the user. Normally we don't check the
      sink limitations when setting a mode from the user. This allows the user
      to specify any mode whether the sink reports to support it or not. This
      can be useful since often the sinks support more modes than they report
      in the EDID.
      
      So relax the checks a bit, and apply the single-link DVI dotclock limit
      only when filtering the mode list, and ignore the limit when setting
      a user specified mode.
      
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=72961Tested-by: NNicholas Vinson <nvinson@comcast.net>
      Cc: stable@vger.kernel.org [3.14]
      Reviewed-by: NDaniel Vetter <daniel@ffwll.ch>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      40478455
    • D
      drm/irq: remove cargo-culted locking from irq_install/uninstall · e090c53b
      Daniel Vetter 提交于
      The dev->struct_mutex locking in drm_irq.c only protects
      dev->irq_enabled. Which isn't really much at all and only prevents
      especially nasty ums userspace from concurrently installing the
      interrupt handling a few times. Or at least trying.
      
      There are tons of unlocked readers of dev->irqs_enabled in the vblank
      wait code (and by extension also in the pageflip code since that uses
      the same vblank timestamp engine).
      
      Real modesetting drivers should ensure that nothing can go haywire
      with a sane setup teardown sequence. So we only really need this for
      the drm_control ioctl, everywhere else this will just paper over
      nastiness.
      
      Note that drm/i915 is a bit specially due to the gem+ums combination.
      So there we also need to properly protect the entervt and leavevt
      ioctls. But it's definitely saner to do everything in one go than to
      drop the lock in-between.
      
      Finally there's the gpu reset code in drm/i915. That one's just race
      (concurrent userspace calls to for vblank waits of pageflips could
      spuriously fail). So wrap it up in with a nice comment since fixing
      this is more involved.
      
      v2: Rebase and fix commit message (Thierry)
      Reviewed-by: NThierry Reding <treding@nvidia.com>
      Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      e090c53b
  6. 17 4月, 2014 1 次提交
  7. 16 4月, 2014 4 次提交