- 04 8月, 2010 7 次提交
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由 Justin P. Mattock 提交于
The patch below fixes a typo in a comment. Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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由 Stefan Weil 提交于
Cc: Jiri Kosina <trivial@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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由 Cyril Chemparathy 提交于
Marvell 88ec048 is a derivative of its 88e1121r device. From the programmer's perspective, the one major difference is the addition of an additional control bit in Page 2 Register 16 - used to control the padding of odd nibble preambles. This patch adds support for this new device, while inheriting as much code as possible from the existing 88e1121r implementation. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Duyck 提交于
This patch addresses an issue seen on 82580 in which the MDICNFG register will be reset during a single function reset and as a result we will be unable to communicate with the PHY. To correct the issue, added a call to reset_mdicnfg just prior to the first access of the MDICNFG register in sgnii_uses_mdio. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Filip Aben 提交于
This patch adds a new product ID to the hso driver. Signed-off-by: NFilip Aben <f.aben@option.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matthias Fuchs 提交于
This patch adds a driver for esd's USB high speed CAN interface. The driver supports devices with multiple CAN interfaces. Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd.eu> Acked-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 8月, 2010 32 次提交
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由 Cyril Chemparathy 提交于
This patch adds support for RGMII RX/TX delay configuration on marvell 88e1121 and derivatives. With this patch, PHY_INTERFACE_MODE_RGMII_*ID modes are now supported on these devices. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Henrique Camargo 提交于
The typo was causing compilation errors since "dev" was not defined. Signed-off-by: NHenrique Camargo <henrique.camargo@ensitec.com.br> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Emil Tantilov 提交于
Synchronize all IRQs when using MSI-X. Similar to ixgbe. Issue was reported on e1000e, but the patch is also valid for igb. CC: Jean Delvare <jdelvare@suse.de> Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Duyck 提交于
This change corrects an issue that resulted in a null pointer dereference for the addition of VLAN 0 without any VLANs being registered. Also this code removes some unnecessary checks for defines and the unnecessary setting of VLAN flags since that is now handled within the kernel via the vlan_features. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NEmil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jeff Kirsher 提交于
Based on original patch/work from Jean Delvare <jdelvare@suse.de> Synchronize all IRQs when in MSI-X IRQ mode. Jean's original patch hard coded the sync with the 3 possible vectors, this patch incorporates more flexibility for the future and aligns with how igb stores the number of vectors into the adapter structure. CC: Jean Delvare <jdelvare@suse.de> Cc: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Acked-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Mickler 提交于
The pm_qos_add_request call has to register the pm_qos request with the pm_qos susbsystem before first use of the pm_qos request via pm_qos_update_request. As pm_qos changed to use plists there is no benefit in registering and unregistering the pm_qos request on ifup/ifdown and thus we move the registering into e1000_open and the unregistering in e1000_close. This fixes the following warning: [ 1.786060] WARNING: at kernel/pm_qos_params.c:264 pm_qos_update_request+0x28/0x54() [ 1.786088] Hardware name: Latitude E6500 [ 1.787045] pm_qos_update_request() called for unknown object [ 1.787966] Modules linked in: [ 1.788940] Pid: 1, comm: swapper Not tainted 2.6.35-rc5-mmotm0719 #1 [ 1.790035] Call Trace: [ 1.791121] [<ffffffff81037335>] warn_slowpath_common+0x80/0x98 [ 1.792205] [<ffffffff810373e1>] warn_slowpath_fmt+0x41/0x43 [ 1.793279] [<ffffffff81057c14>] pm_qos_update_request+0x28/0x54 [ 1.794347] [<ffffffff8134889e>] e1000_configure+0x421/0x459 [ 1.795393] [<ffffffff8134afbd>] e1000_open+0xbd/0x37c [ 1.796436] [<ffffffff8105743a>] ? raw_notifier_call_chain+0xf/0x11 [ 1.797491] [<ffffffff8145f948>] __dev_open+0xae/0xe2 [ 1.798547] [<ffffffff8145f997>] dev_open+0x1b/0x49 [ 1.799612] [<ffffffff8146e36e>] netpoll_setup+0x84/0x259 [ 1.800685] [<ffffffff81b5037c>] init_netconsole+0xbc/0x21f [ 1.801744] [<ffffffff81b5026c>] ? sir_wq_init+0x0/0x35 [ 1.802793] [<ffffffff81b502c0>] ? init_netconsole+0x0/0x21f [ 1.803845] [<ffffffff810002ff>] do_one_initcall+0x7a/0x12f [ 1.804885] [<ffffffff81b2ccae>] kernel_init+0x138/0x1c2 [ 1.805915] [<ffffffff81003554>] kernel_thread_helper+0x4/0x10 [ 1.806937] [<ffffffff81590e00>] ? restore_args+0x0/0x30 [ 1.807955] [<ffffffff81b2cb76>] ? kernel_init+0x0/0x1c2 [ 1.808958] [<ffffffff81003550>] ? kernel_thread_helper+0x0/0x10 [ 1.809958] ---[ end trace 84b562a00a60539e ]--- Signed-off-by: NFlorian Mickler <florian@mickler.org> Tested-by: NValdis Kletnieks <valdis.kletnieks@vt.edu> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Add support for running the driver on any PCI function. Mostly this entails replacing a constant 0 in a number of calls with the variable function number. Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
The device supports TSO+ECN. Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Get info about the availability of Tx on-chip queues from FW and if they are supported set up a memory window for them. iw_cxgb4 will be using them. Move the existing window setup later in the init sequence, after we have collected the new info. Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Commit 1704d748 ("cxgb4vf: small changes to message processing structures/macros") was incomplete and causes cxgb4 to write bad TSO descriptors. Fix that up by reverting the offending part of that commit and adjusting field accesses now that they are one level deeper. Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
The checksum provided by the device doesn't include the L3 headers, as IPv6 expects. Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dimitris Michailidis 提交于
Signed-off-by: NDimitris Michailidis <dm@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dan Carpenter 提交于
There was an error path where "mem_ptr_virt" didn't get unmapped. Signed-off-by: NDan Carpenter <error27@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Krzysztof Hałasa 提交于
SBE 2T3E3 cards use DECchips 21143 but they need a different driver. Don't even try to use a normal tulip driver with them. Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joe Perches 提交于
Remove locally defined equivalents Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch updates the tg3 version to 3.113. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch moves most of the phy related flag definitions over to the phyflags member and changes the code accordingly. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch deletes the link_config.phy_is_low_power flag and creates a new phy_flags device member to store all phy related settings. All the code is converted accordingly. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch replaces some instances of hardcoded phy register values with preprocessor equivalents. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch adds error reporting to the tg3_phydsp_write() function and converts a few more locations to use this function over the inlined equivalent. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
smp_mb() inside tg3_tx_avail() is used twice in the normal tg3_start_xmit() path (see illustration below). The full memory barrier is only necessary during race conditions with tx completion. We can speed up the tx path by replacing smp_mb() in tg3_tx_avail() with a compiler barrier. The compiler barrier is to force the compiler to fetch the tx_prod and tx_cons from memory. In the race condition between tg3_start_xmit() and tg3_tx(), we have the following situation: tg3_start_xmit() tg3_tx() if (!tg3_tx_avail()) BUG(); ... if (!tg3_tx_avail()) netif_tx_stop_queue(); update_tx_index(); smp_mb(); smp_mb(); if (tg3_tx_avail()) if (netif_tx_queue_stopped() && netif_tx_wake_queue(); tg3_tx_avail()) With smp_mb() removed from tg3_tx_avail(), we need to add smp_mb() to tg3_start_xmit() as shown above to properly order netif_tx_stop_queue() and tg3_tx_avail() to check the ring index. If it is not strictly ordered, the tx queue can be stopped forever. This improves performance by about 3% with 2 ports running bi-directional 64-byte packets. Reviewed-by: NBenjamin Li <benli@broadcom.com> Signed-off-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
These devices were never released to the public. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch adds code to determine the APE firmware type and report this along with the firmware version. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
The ASPM workaround setting obtained from NVRAM only works with devices older than 5717. This patch enforces the restriction. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch changes the code to only manage the PCIe gphy power for CPMU-less devices only. The CPMU takes over management for newer chips. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
The phy test register location has been repurposed for 5717+ devices. This patch changes the code to avoid this location for these devices. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
This patch creates a TG3_FLG3_5717_PLUS flag to collectively describe the set of changes in the ASIC that will apply to all future chip revisions. Signed-off-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
The TSS flag needs to be turned off during tg3_close(). If the device fails to allocate more than one MSI-X vector the next time the device is brought up, transmits will fail. Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
tg3 commit e7126997 entitled "tg3: Preserve PCIe MPS setting for new devs" attempted to ensure the PCIe link negotiated Maximum Payload Size (MPS) setting was 128 bytes for all devices that didn't support higher speeds. The 5784 device was mistakenly added to this list when it shouldn't have. This patch removes the 5784 ASIC rev devices from that list. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 7月, 2010 1 次提交
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由 Ajit Khaparde 提交于
GET_STATS request uses the same memory region as the response. If a new request for get stats is fired before the response for the previous get_stats request is received, the response will corrupt the new request, causing the f/w to misbehave. Signed-off-by: NSomnath K <somnathk@serverengines.com> Signed-off-by: NAjit Khaparde <ajitk@serverengines.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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