1. 18 8月, 2017 2 次提交
  2. 16 8月, 2017 8 次提交
  3. 26 7月, 2017 1 次提交
  4. 14 7月, 2017 15 次提交
  5. 30 6月, 2017 2 次提交
  6. 20 6月, 2017 1 次提交
    • A
      drm/amdgpu: Optimize mutex usage (v4) · 5ac55629
      Alex Xie 提交于
      In original function amdgpu_bo_list_get, the waiting
      for result->lock can be quite long while mutex
      bo_list_lock was holding. It can make other tasks
      waiting for bo_list_lock for long period.
      
      Secondly, this patch allows several tasks(readers of idr)
      to proceed at the same time.
      
      v2: use rcu and kref (Dave Airlie and Christian König)
      v3: update v1 commit message (Michel Dänzer)
      v4: rebase on upstream (Alex Deucher)
      Signed-off-by: NAlex Xie <AlexBin.Xie@amd.com>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      5ac55629
  7. 17 6月, 2017 1 次提交
    • D
      amdgpu: use drm sync objects for shared semaphores (v6) · 660e8558
      Dave Airlie 提交于
      This creates a new command submission chunk for amdgpu
      to add in and out sync objects around the submission.
      
      Sync objects are managed via the drm syncobj ioctls.
      
      The command submission interface is enhanced with two new
      chunks, one for syncobj pre submission dependencies,
      and one for post submission sync obj signalling,
      and just takes a list of handles for each.
      
      This is based on work originally done by David Zhou at AMD,
      with input from Christian Konig on what things should look like.
      
      In theory VkFences could be backed with sync objects and
      just get passed into the cs as syncobj handles as well.
      
      NOTE: this interface addition needs a version bump to expose
      it to userspace.
      
      TODO: update to dep_sync when rebasing onto amdgpu master.
      (with this - r-b from Christian)
      
      v1.1: keep file reference on import.
      v2: move to using syncobjs
      v2.1: change some APIs to just use p pointer.
      v3: make more robust against CS failures, we now add the
      wait sems but only remove them once the CS job has been
      submitted.
      v4: rewrite names of API and base on new syncobj code.
      v5: move post deps earlier, rename some apis
      v6: lookup post deps earlier, and just replace fences
      in post deps stage (Christian)
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      660e8558
  8. 15 6月, 2017 2 次提交
  9. 09 6月, 2017 2 次提交
  10. 08 6月, 2017 3 次提交
  11. 07 6月, 2017 1 次提交
  12. 01 6月, 2017 2 次提交
    • A
      drm/amdgpu: implement lru amdgpu_queue_mgr policy for compute v4 · 795f2813
      Andres Rodriguez 提交于
      Use an LRU policy to map usermode rings to HW compute queues.
      
      Most compute clients use one queue, and usually the first queue
      available. This results in poor pipe/queue work distribution when
      multiple compute apps are running. In most cases pipe 0 queue 0 is
      the only queue that gets used.
      
      In order to better distribute work across multiple HW queues, we adopt
      a policy to map the usermode ring ids to the LRU HW queue.
      
      This fixes a large majority of multi-app compute workloads sharing the
      same HW queue, even though 7 other queues are available.
      
      v2: use ring->funcs->type instead of ring->hw_ip
      v3: remove amdgpu_queue_mapper_funcs
      v4: change ring_lru_list_lock to spinlock, grab only once in lru_get()
      Signed-off-by: NAndres Rodriguez <andresx7@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      795f2813
    • A
      drm/amdgpu: untie user ring ids from kernel ring ids v6 · effd924d
      Andres Rodriguez 提交于
      Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
      ring ids from the kernel's ring ids.
      
      The queue manager maintains a per-file descriptor map of user ring ids
      to amdgpu_ring pointers. Once a map is created it is permanent (this is
      required to maintain FIFO execution guarantees for a context's ring).
      
      Different queue map policies can be configured for each HW IP.
      Currently all HW IPs use the identity mapper, i.e. kernel ring id is
      equal to the user ring id.
      
      The purpose of this mechanism is to distribute the load across multiple
      queues more effectively for HW IPs that support multiple rings.
      Userspace clients are unable to check whether a specific resource is in
      use by a different client. Therefore, it is up to the kernel driver to
      make the optimal choice.
      
      v2: remove amdgpu_queue_mapper_funcs
      v3: made amdgpu_queue_mgr per context instead of per-fd
      v4: add context_put on error paths
      v5: rebase and include new IPs UVD_ENC & VCN_*
      v6: drop unused amdgpu_ring_is_valid_index (Alex)
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NAndres Rodriguez <andresx7@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      effd924d