1. 18 9月, 2013 2 次提交
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      ARM: tegra: remove common.c · 51100bdc
      Stephen Warren 提交于
      common.c was create to contain code shared across the various Tegra board
      files. There is now only one board file, tegra.c. So, move the code there.
      One exception is the PMC reboot routine, which moves to pmc.c, and now
      takes advantage of the 'standard' tegra_pmc_readl/writel functions.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      51100bdc
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      ARM: tegra: split tegra_pmc_init() in two · d2207071
      Stephen Warren 提交于
      Tegra's board file currently initializes clocks much earlier than those
      for most other ARM SoCs. The reason is:
      
      * The PMC HW block is involved in the path of some interrupts (i.e. it
      inverts, or not, the IRQ input pin dedicated to the PMIC).
      
      * So, that part of the PMC must be initialized early so that the IRQ
      polarity is correct.
      
      * The PMC initialization is currently monolithic, and the PMC has some
      clock inputs, so the init routine ends up calling of_clk_get_by_name(),
      and hence clocks must be set up early too.
      
      In order to defer clock initialization to the more typical location,
      split out the portions of tegra_pmc_init() that are truly IRQ-related
      into a separate tegra_pmc_init_irq(), which can be called from the
      machine descriptor's .init_irq() function, and defer the rest until
      the machine descriptor's .init_machine() function. This allows the
      clock initiliazation to happen from the machine descriptor's
      .init_time() function, as is typical.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      d2207071
  2. 14 8月, 2013 1 次提交
  3. 29 7月, 2013 1 次提交
  4. 05 4月, 2013 1 次提交
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      clk: tegra: defer application of init table · 441f199a
      Stephen Warren 提交于
      The Tegra clock driver is initialized during the ARM machine descriptor's
      .init_irq() hook. It can't be initialized earlier, since dynamic memory
      usage is required. It can't be initialized later, since the .init_timer()
      hook needs the clocks initialized. However, at this time, udelay()
      doesn't work.
      
      The Tegra clock initialization table may enable some PLLs. Enabling a PLL
      may require usage of udelay(). Hence, this can't happen right when the
      clock driver is initialized.
      
      To solve this, separate the clock driver initialization from the clock
      table processing, so they can execute at separate times.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      441f199a
  5. 16 3月, 2013 1 次提交
  6. 12 3月, 2013 3 次提交
  7. 29 1月, 2013 5 次提交
  8. 13 1月, 2013 1 次提交
  9. 25 12月, 2012 1 次提交
  10. 16 11月, 2012 1 次提交
  11. 14 11月, 2012 1 次提交
  12. 06 11月, 2012 4 次提交
  13. 17 10月, 2012 1 次提交
  14. 15 9月, 2012 5 次提交
    • S
      ARM: tegra: remove dead code · bab53ce3
      Stephen Warren 提交于
      Now that all boards are converted to device tree, devices.[ch] and
      board-pinmux.[ch] are no longer used. So, remove them.
      
      The only exception is the EHCI platform data in devices.h. Move that
      data to board-dt-tegra20.c - the only places it's used.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      bab53ce3
    • L
      ARM: dt: tegra: harmony: add regulators · 3cc404de
      Laxman Dewangan 提交于
      Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
      couple of fixed GPIO-controlled regulators too.
      
      Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
      and converted to Harmony.
      
      swarren made the following changes:
      * Added ldo0 regulator configuration to device tree, and updated
        board-harmony-pcie.c for the new regulator name.
      * Fixed vdd_1v05's voltage from 10.5V to 1.05V.
      * Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
        run-time from device tree instead of hard-coding it.
      * Removed board-harmony{-power.c,.h} now that they're unused.
      * Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
        this GPIO for now. This will be fixed when the PCIe driver is re-
        written as a driver. The code can't regulator_get("vdd_1v05") right
        now, because the vdd_1v05 regulator's probe gets deferred due to its
        supply being the PMIC, which gets probed after the regulator the first
        time around, and this dependency is only resolved by repeated probing,
        which happens when deferred_probe_initcall() is called, which happens
        in a late initcall, whose runtime order relative to harmony_pcie_init()
        is undefined, since that's also called from a late initcall.
      * Removed unused harmony_pcie_initcall().
      Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      3cc404de
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      ARM: tegra: remove board (but not DT) support for Harmony · bb25af81
      Stephen Warren 提交于
      Harmony can be booted using device tree with equal functionality as when
      booted using a board file. Remove as much of the board file as is
      possible, since it's no longer needed.
      
      Two special-cases are still left in board-dt-tegra20.c, since the Tegra
      PCIe driver doesn't support device tree yet, and the Harmony .dts file
      doesn't yet describe regulators which are needed for PCIe. This logic is
      now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While
      this is more code than other boards, it's still unlikely to be much of a
      problem, and both regulators and PCIe should be supported via device tree
      in the near future, allowing the remaining code to be removed.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      bb25af81
    • S
      ARM: tegra: remove board (but not DT) support for Paz00 · cff1dfbf
      Stephen Warren 提交于
      Paz00 (Toshiba AC100) can be booted using device tree with equal
      functionality as when booted using a board file. Remove as much of the
      board file as is possible, since it's no longer needed.
      
      One special-case is still left in board-dt-tegra20.c, since there is no
      way to create a WiFi rfkill device from device tree yet. This logic is
      now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra
      cases where it's enabled (.configs which did not enable Paz00 support)
      shouldn't impact much since the amount of code is tiny.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-By: NMarc Dietrich <marvin24@gmx.de>
      cff1dfbf
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      ARM: tegra: remove board (but not DT) support for TrimSlice · be6a9194
      Stephen Warren 提交于
      TrimSlice can be booted using device tree with equal functionality as
      when booted using a board file. Remove the board file since it's no
      longer needed.
      
      One special-case is still left in board-dt-tegra20.c, since the Tegra
      PCIe driver doesn't support device tree yet. This logic is now enabled
      by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra
      cases where it's enabled (.configs which did not enable TrimSlice
      support) shouldn't impact much since the amount of code is tiny.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      be6a9194
  15. 13 9月, 2012 1 次提交
  16. 07 9月, 2012 1 次提交
    • S
      ARM: tegra: turn on UART A clock at boot · 37c241ed
      Stephen Warren 提交于
      Some boards use UART D for the main serial console, and some use UART A.
      UART D's clock is listed in board-dt-tegra20.c's clock table, whereas
      UART A's clock is not. This causes the clock code to think UART A's
      clock is unsed. The common clock framework turns off unused clocks at
      boot time. This makes the kernel appear to hang. Add UART A's clock into
      the clock table to prevent this. Eventually, this requirement should be
      handled by the UART driver, and/or properties in a board-specific device
      tree file.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      37c241ed
  17. 03 7月, 2012 1 次提交
  18. 30 6月, 2012 1 次提交
  19. 27 6月, 2012 1 次提交
  20. 21 6月, 2012 3 次提交
    • S
      ARM: tegra: paz00: enable WiFi rfkill when booting from device tree · b64a02c6
      Stephen Warren 提交于
      There currently aren't bindings for a WiFi rfkill button, and defining
      a good binding is non-trivial. Manually register this "device" when
      booting from device tree, in order to bring DT support to the same
      feature level as board files, which will in turn allow board files to be
      deprecated.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      b64a02c6
    • S
      ARM: tegra: harmony: init regulators, PCIe when booting from DT · a12c0efc
      Stephen Warren 提交于
      There currently aren't bindings for the Tegra PCIe controller. Work on
      this is in progress, but not yet complete. Manually initialize PCIe when
      booting from device tree, in order to bring DT support to the same
      feature level as board files, which will in turn allow board files to be
      deprecated.
      
      PCIe on Harmony requires various regulators to be registered and enabled
      before initializing the PCIe controller. Note that since the I2C
      controllers are instantiated from DT, we must use i2c_new_device() to
      register the PMU rather than i2c_register_board_info().
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      a12c0efc
    • S
      ARM: tegra: trimslice: enable PCIe when booting from device tree · c554dee3
      Stephen Warren 提交于
      There currently aren't bindings for the Tegra PCIe controller. Work on
      this is in progress, but not yet complete. Manually initialize PCIe when
      booting from device tree, in order to bring DT support to the same
      feature level as board files, which will in turn allow board files to be
      deprecated.
      
      PCIe hosts the wired Ethernet controller on TrimSlice.
      
      To support this, add infra-structure to board-dt-tegra20.c for board-
      specific initialization code. Once device tree support for the relevant
      features is in place, this code will be removed.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      c554dee3
  21. 08 5月, 2012 1 次提交
  22. 19 4月, 2012 2 次提交
  23. 17 4月, 2012 1 次提交