Current DMA implementation was not handling the continuous selection
format viz. SPI chip select would be deasserted even between sequential
serial transfers.

Use existing dspi_data_to_pushr function to restructure the transmit
code path and set or reset the CONT bit on same lines as code path
in EOQ mode does. This correctly implements continuous selection format
while also correcting and cleaning up the transmit code path.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Currently dmaengine_prep_slave_single was being called with length
set to the complete DMA buffer size. This resulted in unwanted bytes
being transferred to the SPI register leading to clock and MOSI lines
having unwanted data even after chip select got deasserted and the
required bytes having been transferred.

While at it also clean up the use of curr_xfer_len which is central
to the DMA setup, from bytes to DMA transfers for every use.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NMark Brown <broonie@kernel.org>

Buffers allocated with a call to dma_alloc_coherent should be
freed with dma_free_coherent instead of the currently used
devm_kfree.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Current DMA implementation had a bug where the DMA transfer would
exit the loop in dspi_transfer_one_message after the completion of
a single transfer. This results in a multi message transfer submitted
with SPI_IOC_MESSAGE to terminate incorrectly without an error.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add DMA support for Vybrid.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Once dspi is used in uboot, the SPI_SR have been set by some value.
At this time, if kernel enable the interrupt before clear the
status flag, that will trigger the wrong interrupt.
Signed-off-by: NYuan Yao <yao.yuan@nxp.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The call sequence spi_alloc_master/spi_register_master/spi_unregister_master
is complete; it reduces the device reference count to zero, which and results
in device memory being freed. The subsequent call to spi_master_put is
unnecessary and results in an access to free memory. Drop it.

Fixes: 9298bc72 ("spi: spi-fsl-dspi: Remove spi-bitbang")
Signed-off-by: NWei Yongjun <weiyj.lk@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

clk_prepare_enable() may fail, so we should better check its
return value and propagate it in the case of failure.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

of_match_device could return NULL, and so cause a NULL pointer
dereference later.

For fixing this problem, we use of_device_get_match_data(), this will
simplify the code a little by using a standard function for
getting the match data.

Reported-by: coverity (CID 1324129)
Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

of_id->data is const, so instead of casting the pointer to drop its
const status, this patch constify the devtype_data pointer.
Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

There are use cases when chip select should be triggered between transfers
in single SPI message. Current implementation does this only on last
transfer in message ignoring cs_change value provided in current transfer.
Signed-off-by: NAndrey Vostrikov <andrey.vostrikov@cogentembedded.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Calculate and update max speed from bus clock for SoCs
using DSPI IP.

The bus clock factor's are taken from the data sheets
of respective SoCs.
Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NMark Brown <broonie@kernel.org>

DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
implementation CTAR offset is derived from CS instance which will
lead to out of bound access if chip select instance is greater than
CTAR register instance, hence use single CTAR0 register for all CS
instances. Since we write the CTAR register anyway before each access,
there is no value in using the additional CTAR registers. Also one
should not program a value in CTAS for a CTAR register that is not
present, hence configure CTAS to use CTAR0.
Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NMark Brown <broonie@kernel.org>

SPI core makes sure that transfer speed is always set so code here writes
the same register with the same value twice. Code has been doing this from
the beginning.

This looks to me some sort of copy paste error so I'm removing the second
write. If this is not the case we can bring it back with a comment.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add support for "sleep" state of pinctrl.
Signed-off-by: NMirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

In current driver, we increase actual_length in the following way:
message->actual_length += dspi_xxx_transfer()
It has two defects.
First, transmitting maybe in process when the function call finished and
we don't know the transmitting result in this moment.
Secondly, the last sentence in function before returning is accessing the
SPI register and trigger the data transmitting. If we enable interrupt,
interrupt may be generated before function return and we also have the same
sentence "message->actual_length += dspi_xxx_transfer()"
in the IRQ handler.
And usually dspi_xxx_transfer will trigger a new IRQ.
The original dspi_xxx_transfer call may return when no new IRQ generate.
This may mess the variable spi_message->actual_length.
Now we increase the variable in the IRQ handler and only when we get the
TCF or EOQ interrupt
And we get the transmitted data length from the SPI transfer counter
instead of the function return value.
Signed-off-by: NHaikun Wang <haikun.wang@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

DSPI module has two optional interrupts when complete data transfer.
One is EOQ interrupt, the other one is TCF interrupt.
EOQ indicates a queue of data frame has been transmitted.
TCF indicates a frame has been transmitted.
This patch enable support TCF mode.
Driver binds a correct interrupt mode to every compatible string.
User should use the correct compatible string in the dts node.
Signed-off-by: NHaikun Wang <haikun.wang@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

SPI chip select signal need to keep asserted between several
spi_transfer in the same spi_message usually.
But the driver will de-assert CS signal and the assert it between
serval spi_transfer in the same spi_message under some condiations.
This patch fix the bug.

Here is an example:
Assume you have two variables like the following,
struct spi_transfer a;
struct spi_transfer b;
if you send a spi_message only includes 'a' first,
and then you send a spi_message includes 'a' and 'b'
but without resetting 'a'.
Driver will de-assert CS and then assert CS between 'a' and 'b'.
Signed-off-by: NHaikun Wang <haikun.wang@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

It is unnecessary for DSPI to enable/disable clk when access DSPI register.
And it will reduce efficiency.
Signed-off-by: NHaikun Wang <haikun.wang@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add delay between chip select and clock signals, before clock starts and
after clock stops.
Signed-off-by: NAaron Brice <aaron.brice@datasoft.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Previous algorithm had an outer loop with the values {2,3,5,7} and an
inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first
value over the required scaling value (where the total scale was the two
numbers multiplied).

Since the inner loop went up to 32768 it would always pick a value of 2
for PBR and a much higher than necessary value for BR.  The desired
scale factor was being divided by two I believe to compensate for the
much higher scale factors (the divide by two not specified in the
reference manual).

Updated to check all values and find the smallest scale factor possible
without going over the desired clock rate.
Signed-off-by: NAaron Brice <aaron.brice@datasoft.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Previous algorithm had an outer loop with the values {2,3,5,7} and an
inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first
value over the required scaling value (where the total scale was the two
numbers multiplied).

Since the inner loop went up to 32768 it would always pick a value of 2
for PBR and a much higher than necessary value for BR.  The desired
scale factor was being divided by two I believe to compensate for the
much higher scale factors (the divide by two not specified in the
reference manual).

Updated to check all values and find the smallest scale factor possible
without going over the desired clock rate.
Signed-off-by: NAaron Brice <aaron.brice@datasoft.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Move the check for spi->bits_per_word
before allocation, to avoid memory leak.
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

DSPI module need cs change information in
a spi transfer. According to cs change, DSPI
will give last data the right flag. Bitbang
provide cs change behind the last data in
a transfer. So DSPI can not deal the last
data in every transfer properly, so remove
the bitbang in the driver.
Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

devm_* API was supposed to be used only in probe function call.
Memory is allocated at 'probe' and free automatically at 'remove'.
Usage of devm_* functions outside probe sometimes leads to memory leak.
Avoid using devm_kzalloc in dspi_setup_transfer and use kzalloc instead.
Also add the dspi_cleanup function to free the controller data upon
cleanup.
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

There are only 4 CTAR registers (CTAR0 - CTAR3) so we can only use the
lower 2 bits of the chip select to select a CTAR register.
SPI_PUSHR_CTAS used the lower 3 bits which would result in wrong bit values
if the chip selects 4/5 are used. For those chip selects SPI_CTAR even
calculated offsets of non-existing registers.
Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

Since we are using regmap framework's internal locks, so the
lock_arg for dspi_regmap_config is redundant here.

This patch just remove it, and then the dspi_regmap_config could
be const type.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Sort all the include headers alphabetically for the freescale
spi drivers. If the inlcude headers sorted out of order, maybe
the best logical choice is to append new ones after the exist
ones, while this may create a lot of potential for duplicates
and conflicts for each diffenent changes will add new headers
in the same location.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Remove the probe info message which also has wrong output. No need to add
KERN_INFO to pr_info. Output was:
6Freescale DSPI master initialized
Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Acked-by: NChao Fu <b44548@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Make of_device_id array const, because all OF functions
handle it as const.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The memory allocated for chip is not freed anywhere.
Convert to use devm_kzalloc to fix the memory leak.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Current code set platform drvdata to dspi. However, the code in dspi_suspend()
and dspi_resume() assumes the drvdata is the address of master.
Fix it by setting platform drvdata to master.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

Remove some coding sytle not in standard in former code.
Signed-off-by: NChao Fu <b44548@freescale.com>
Reviewed-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.

Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.
Signed-off-by: NChao Fu <b44548@freescale.com>
Reviewed-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The implementation in spi_setup() already set spi->bits_per_word = 8 when
spi->bits_per_word is 0 before calling spi->master->setup.
So we don't need to do it again in setup() callback.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NMarek Vasut <marex@denx.de>
Acked-by: NBarry Song <Baohua.Song@csr.com>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

clock source is prepared and enabled by clk_prepare_enable()
in probe function, but no disable or unprepare in remove.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMark Brown <broonie@linaro.org>

Many drivers that use bitbang library have a leak on probe error paths.
This is because once a spi_master_get() call succeeds, we need an additional
spi_master_put() call to free the memory.

Fix this issue by moving the code taking a reference to master to
spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on
success. With this change, the caller is responsible for calling
spi_bitbang_stop() to decrement the reference and spi_master_put() as
counterpart of spi_alloc_master() to prevent a memory leak.

So now we have below patten for drivers using bitbang library:

probe:
spi_alloc_master        -> Init reference count to 1
spi_bitbang_start       -> Increment reference count
remove:
spi_bitbang_stop        -> Decrement reference count
spi_master_put          -> Decrement reference count (reference count reaches 0)

Fixup all users accordingly.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Suggested-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMark Brown <broonie@linaro.org>