1. 28 3月, 2017 1 次提交
  2. 02 3月, 2017 1 次提交
  3. 28 2月, 2017 1 次提交
  4. 23 2月, 2017 1 次提交
  5. 21 2月, 2017 1 次提交
  6. 15 2月, 2017 3 次提交
    • B
      powerpc/xmon: Enable disassembly files (compilation changes) · 5b102782
      Balbir Singh 提交于
      After updating ppc-dis.c, ppc-opc.c and ppc.h the following changes were
      made to enable compilation and working of xmon:
      
        1.  Remove all disassembler_info
        2.  Use xmon's printf/print_address to output data and addresses
            respectively.
        3.  All bfd_* types and casts have been removed.
        4.  Optimizations related to opcd_indices have been removed.
        5.  The dialect is set based on cpu features.
        6.  PPC_OPCODE_CLASSIC is no longer supported in the new
            disassembler.
        7.  VLE opcode parsing and printing has been stripped.
        8.  Coding style conventions used for those routines has
            been retained and it does not match our CodingStyle.
        9.  The highest supported dialect is POWER9.
        10. Defined ATTRIBUTE_UNUSED in ppc-dis.c.
        11. Defined _(x) in ppc-dis.c.
      
      Finally, we remove the dependency on BROKEN so that XMON_DISASSEMBLY can
      be enabled again.
      Signed-off-by: NBalbir Singh <bsingharora@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      5b102782
    • B
      powerpc/xmon: Apply binutils changes to upgrade disassembly · 08d96e0b
      Balbir Singh 提交于
      The following commit-ids from the binutils project were applied on the
      xmon branch and relicensed with the permission of the authors under
      GPLv2 for the following files:
      
        ppc-opc.c
        ppc-dis.c
        ppc.h
      
      Working off of binutils commit 65b650b4c746 we have now moved up to
      binutils commit a5721ba270dd.
      
      Some commit logs have been taken verbatim, some are summarized for ease
      of understanding.
      
      Here is a summary of the commits:
      
       33e8d5ac613d PPC7450 New.  (powerpc_opcodes): Use it in dcba.
       c3d65c1ced61 New opcodes and mask
       8dbcd839b1bb Instruction Sorting
       91eb7075e370 (powerpc_opcodes): Fix the first two operands of dquaiq.
       548b1dcfcbab ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix.
       930bb4cfae30 Support optional L form mtmsr.
       de866fccd87d (powerpc_opcodes): Order and format.
       19a6653ce8c6 ppc e500mc support
       fa452fa6833c (ppc_cpu_t): New typedef.
       c8187e1509b2 (parse_cpu): Handle -m464.
       081ba1b3c08b Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI)
       9b4e57660d38 Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7.
       899d85beadd0 (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
       e1c93c699b7d (extract_sprg): Correct operand range check.
       2f3bb96af796 (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
       1cb0a7674666 (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test
       21169fcfadfa (print_insn_powerpc): Skip insn if it is deprecated
       80890a619b85 ("dcbt", "dcbtst")
       0e55be1624c2 ("lfdepx", "stfdepx")
       066be9f7bd8e (parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
       c72ab5f2c55d (powerpc_opcodes): Reorder the opcode table so that instructions
       69fe9ce501f5 (ppc_parse_cpu): New function. 	(powerpc_init_dialect)
       e401b04ca7cd (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and E500MC entries.
       70dc4e324b9a (powerpc_init_dialect): Do not choose a default dialect due to -many/-Many.
       858d7a6db20b (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", "tlbilx"
       bdc7fcfe59f1 (powerpc_macros <extrdi>): Allow n+b of 64
       e0d602ecffb0 (md_show_usage): Document -mpcca2
       b961e85b6ebe (ppc_cpu_t): Typedef to uint64_t
       8765b5569284 (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux"
       634b50f2a623 Rename "ppca2" to "a2"
       9fe54b1ca1c0 (md_show_usage): Document -m476
       0dc9305793c8 Add bfd_mach_ppc_e500mc64
       ce3d2015b21b Define. bfd/ 	* archures.c (bfd_mach_ppc_titan)
       cdc51b0748c4 Add -mpwr4, -mpwr5, -mpwr5x, -mpwr6 and -mpwr7
       63d0fa4e9e57 Add PPC_OPCODE_E500MC for "e500mc64"
       cee62821d472 New Define. ("dccci"): Enable for PPCA2
       85d4ac0b3c0b Correct wclr encoding.
       51b5d4a8c5e5 (powerpc_opcodes): Enable divdeu, devweu, divde, divwe, divdeuo
       e01d869a3be2 (md_assemble): Emit APUinfo section for PPC_OPCODE_E500
       09a8ad8d8f56 (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf and mtocrf on EFS.
       f2bae120dcef (PPC_OPCODE_COMMON): Expand comment.
       81a0b7e2ae09 (PPCPWR2): Add PPC_OPCODE_COMMON. (powerpc_opcodes): Add "subc"
       bdc70b4a03fd (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC)
       7102e95e4943 (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t before inverting
       f383de6633cb (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate on E500 and E500MC
       6b069ee70de3 Remove PPC_OPCODE_PPCPS
       2f7f77101279 (powerpc_opcodes): Enable icswx for POWER7
       989993d80a97 (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, RBX)
       a08fc94222d1 <drrndq, drrndq., dtstexq, dctqpq, dctqpq., dctfixq, dctfixq.
       8ebac3aae962 (ISA_V2): Define and use for relevant BO field tests
       aea77599d0db Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR
       b240011aba98 (disassemble_init_for_target): Handle ppc init.
       d668828207c2 (powerpc_opcd_indices): Bump array size
       b9c361e0ad33 Add support for PowerPC VLE.
       e1dad58d73dc (has_tls_reloc, has_tls_get_addr_call, has_vle_insns, is_ppc_vle)
       df7b86aa4cb6 Add check that sysdep.h has been included before
       98c76446ea6b (extract_sprg): Use ALLOW8_SPRG to include VLE.
       a4ebc835cbcb (powerpc_macros): Add entries for e_extlwi to e_clrlslwi
       94caa966375d (has_vle_insns, is_ppc_vle): Delete
       c7a8dbf91f37 Change RA to RA0
       d908c8af5a1d Add necessary casts for printing integer values
       03edbe3bfb93 Add/remove PPCVLE for some 32-bit insns
       9f6a6cc022e1 <xnop, yield, mdoio, mdoom>: New extended mnemonics
       588925d06545 <RSQ, RTQ>: Use PPC_OPERAND_GPR
       8baf7b78b5d9 <"lswx">: Use RAX for the second and RBX for the third operand
       e67ed0e885d6 Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt
       fb048c26f19f (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK, VXVDVA_MASK
       382c72e90441 (VXASHB_MASK): New define
       c7a5aa9c64fc (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2
       ab4437c3224f <vcfpsxws>: Fix opcode spelling
       62082a42b9cd "lfdp" and "stfdp" use DS offset.
       776fc41826bb (ppc_parse_cpu): Update prototype
       943d398f4c52 (insert_sci8, extract_sci8): Rewrite.
       5817ffd1f81c New define (PPC_OPCODE_HTM/POWER8)
       9f0682fe89d9 (extract_vlesi): Properly sign extend
       c0637f3af686 (powerpc_init_dialect): Set default dialect to power8.
       58ae08f29af8 (powerpc_opcodes): Add tdui, twui, tdu, twu, tui, tu
       4f6ffcd38d90 (powerpc_init_dialect): Use ppc_parse_cpu() to set dialect
       4b95cf5c0c75 Update copyright years
       a47622ac1bad Allow both signed and unsigned fields in PowerPC cmpli insn
       12e87fac5c76 ppc: enable msgclr and msgsnd on Power8
       8514e4db84cc Don't deprecate powerpc mftb insn
       db76a70026ab Power4 should treat mftb as extended mfspr mnemonic
       b90efa5b79ac ChangeLog rotatation and copyright year update
       c4e676f19656 powerpc: Add slbfee. instruction
       27c49e9a8fc0 powerpc: Only initialise opcode indices once
       4fff86c517ab DCBT_EO): New define
       4bc0608a8b69 Fix some PPC assembler errors
       dc302c00611b Add hwsync extended mnemonic
       99a2c5612124 Remove unused MTMSRD_L macro and re-add accidentally deleted comment
       11a0cf2ec0ed Allow for optional operands with non-zero default values
       7b9341139a69 PPC sync instruction accepts invalid and incompatible operands
       ef5a96d564a2 Remove ppc860, ppc750cl, ppc7450 insns from common ppc
       43e65147c07b Remove trailing spaces in opcodes
       6dca4fd141fd Add dscr and ctrl SPR mnemonics
       b6518b387185 Fix compile time warnings generated when compiling with clang
       36f7a9411dcd Patches for illegal ppc 500 instructions
       a680de9a980e Add assembler, disassembler and linker support for power9
       dd2887fc3de4 Reorder some power9 insns
       b817670b52b7 Enable 2 operand form of powerpc mfcr with -many
       6f2750feaf28 Copyright update for binutils
       afa8d4054b8e Delete opcodes that have been removed from ISA 3.0
       1178da445ad5 Accept valid one byte signed and unsigned values for the IMM8 operand
       e43de63c8fd1 Fix powerpc subis range
       514e58b72633 Correct "Fix powerpc subis range"
       19dfcc89e8d9 Add support for new POWER ISA 3.0 instructions
       1fe0971e41a4 add more extern C
       026122a67044 Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu
       14b57c7c6a53 PowerPC VLE
       6fd3a02da554 Add support for yet some more new ISA 3.0 instructions
       dfdaec14b0db Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions
       fd486b633e87 Modify POWER9 support to match final ISA 3.0 documentation
       a5721ba270dd Disallow 3-operand cmp[l][i] for ppc64
      
      This updates the disassembly capabilities to add support for newer
      processors.
      Signed-off-by: NBalbir Singh <bsingharora@gmail.com>
      [mpe: Reformat commit list for brevity]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      08d96e0b
    • B
      powerpc/xmon: Update ppc-dis/opc.c and ppc.h · cc7639ce
      Balbir Singh 提交于
      Upgrade ppc-opc.c, ppc-dis.c and ppc.h to the versions belonging to the
      following binutils commit:
      
        65b650b4c7463f4508bed523c24ab0031a5ae5cd
        * ppc-dis.c (print_insn_powerpc): Don't skip all operands after
          setting skip_optional.
      
      That is the last version of those files that were licensed under GPLv2.
      
      This leaves the code in a state that does not compile, because the
      binutils code needs to be tweaked to work in the kernel. We don't fix
      that in this commit, because we want to import more binutils changes in
      subsequent commits. So for now we mark XMON_DISASSEMBLY as BROKEN, so it
      can't be built.
      Signed-off-by: NBalbir Singh <bsingharora@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      cc7639ce
  7. 02 2月, 2017 1 次提交
  8. 14 1月, 2017 2 次提交
  9. 25 11月, 2016 1 次提交
    • M
      powerpc/xmon: Add 'dt' command to dump trace buffers · 56144ec7
      Michael Ellerman 提交于
      There is a nice interface for asking ftrace to dump all its tracing
      buffers. The only down side for use in xmon is that it uses printk.
      Depending on circumstances printk may not work when in xmon, but it also
      may, so add a 'dt' command which dumps the ftrace buffers, and add a
      note to the help to mentiont that it uses printk.
      
      Calling this routine also disables tracing, which is problematic if you
      return from xmon and expect the system to keep operating normally. So
      after we do the dump turn tracing back on.
      
      Both functions already have nop versions defined for when ftrace is not
      enabled, so we don't need any extra #ifdefs.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      56144ec7
  10. 13 9月, 2016 1 次提交
  11. 01 8月, 2016 1 次提交
  12. 14 7月, 2016 5 次提交
  13. 09 7月, 2016 1 次提交
  14. 11 5月, 2016 2 次提交
    • P
      powerpc/xmon: Fix SPR read/write commands and add command to dump SPRs · 31cdd0c3
      Paul Mackerras 提交于
      xmon has commands for reading and writing SPRs, but they don't work
      currently for several reasons. They attempt to synthesize a small
      function containing an mfspr or mtspr instruction and call it. However,
      the instructions are on the stack, which is usually not executable.
      Also, for 64-bit we set up a procedure descriptor, which is fine for the
      big-endian ABIv1, but not correct for ABIv2. Finally, the code uses the
      infrastructure for catching memory errors, but that only catches data
      storage interrupts and machine check interrupts, but a failed
      mfspr/mtspr can generate a program interrupt or a hypervisor emulation
      assist interrupt, or be a no-op.
      
      Instead of trying to synthesize a function on the fly, this adds two new
      functions, xmon_mfspr() and xmon_mtspr(), which take an SPR number as an
      argument and read or write the SPR. Because there is no Power ISA
      instruction which takes an SPR number in a register, we have to generate
      one of each possible mfspr and mtspr instruction, for all 1024 possible
      SPRs. Thus we get just over 8k bytes of code for each of xmon_mfspr()
      and xmon_mtspr(). However, this 16kB of code pales in comparison to the
      > 130kB of PPC opcode tables used by the xmon disassembler.
      
      To catch interrupts caused by the mfspr/mtspr instructions, we add a new
      'catch_spr_faults' flag. If an interrupt occurs while it is set, we come
      back into xmon() via program_check_interrupt(), _exception() and die(),
      see that catch_spr_faults is set and do a longjmp to bus_error_jmp, back
      into read_spr() or write_spr().
      
      This adds a couple of other nice features: first, a "Sa" command that
      attempts to read and print out the value of all 1024 SPRs. If any mfspr
      instruction acts as a no-op, then the SPR is not implemented and not
      printed.
      
      Secondly, the Sr and Sw commands detect when an SPR is not
      implemented (i.e. mfspr is a no-op) and print a message to that effect
      rather than printing a bogus value.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      31cdd0c3
    • A
      powerpc/mm/radix: Use STD_MMU_64 to properly isolate hash related code · caca285e
      Aneesh Kumar K.V 提交于
      We also use MMU_FTR_RADIX to branch out from code path specific to
      hash.
      
      No functionality change.
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      caca285e
  15. 10 2月, 2016 1 次提交
  16. 09 2月, 2016 1 次提交
  17. 08 2月, 2016 1 次提交
  18. 21 1月, 2016 1 次提交
  19. 17 12月, 2015 1 次提交
  20. 14 12月, 2015 1 次提交
    • R
      powerpc/xmon: Append linux_banner to exception information in xmon. · eb925d64
      Rashmica Gupta 提交于
      Currently if you are in xmon without an oops etc. to view the kernel
      version you have to type "d $linux_banner" - not necessarily obvious. As
      this is useful information, append to the output of "e" command.
      
      Example output:
        $mon> e
        cpu 0x1: Vector: 0  at [c0000000f879ba80]
            pc: c000000000081718: sysrq_handle_xmon+0x68/0x80
            lr: c000000000081718: sysrq_handle_xmon+0x68/0x80
            sp: c0000000f879bbe0
           msr: 8000000000009033
          current = 0xc0000000f604d5c0
          paca    = 0xc00000000fdc0480	 softe: 0	 irq_happened: 0x01
            pid   = 2467, comm = bash
        Linux version 4.4.0-rc2-00008-gc51af91c3ab3-dirty (rashmica@circle) (gcc
        version 5.1.1 20150629 (GCC) ) #45 SMP Wed Nov 25 10:25:12 AEDT 2015
      Signed-off-by: NRashmica Gupta <rashmicy@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      eb925d64
  21. 15 10月, 2015 3 次提交
    • M
      powerpc/xmon: Add some more elements to the existing PACA dump list · ad987fc8
      Michael Ellerman 提交于
      This patch adds a set of new elements to the existing PACA dump list
      inside an xmon session which can be listed below improving the overall
      xmon debug support.
      
      With this patch, a typical xmon PACA dump looks something like this.
      
      paca for cpu 0x0 @ c00000000fdc0000:
       possible             = yes
       present              = yes
       online               = yes
       lock_token           = 0x8000            	(0xa)
       paca_index           = 0x0               	(0x8)
       kernel_toc           = 0xc000000001393200	(0x10)
       kernelbase           = 0xc000000000000000	(0x18)
       kernel_msr           = 0xb000000000001033	(0x20)
       emergency_sp         = 0xc00000003fff0000	(0x28)
       mc_emergency_sp      = 0xc00000003ffec000	(0x2e0)
       in_mce               = 0x0               	(0x2e8)
       hmi_event_available  = 0x0               	(0x2ea)
       data_offset          = 0x1fe7b0000       	(0x30)
       hw_cpu_id            = 0x0               	(0x38)
       cpu_start            = 0x1               	(0x3a)
       kexec_state          = 0x0               	(0x3b)
       slb_shadow[0]:       = 0xc000000008000000 0x40016e7779000510
       slb_shadow[1]:       = 0xd000000008000001 0x400142add1000510
       vmalloc_sllp         = 0x510             	(0x1b8)
       slb_cache_ptr        = 0x4               	(0x1ba)
       slb_cache[0]:        = 0x000000000003f000
       slb_cache[1]:        = 0x0000000000000001
       slb_cache[2]:        = 0x0000000000000003
       slb_cache[3]:        = 0x0000000000001000
       slb_cache[4]:        = 0x0000000000001000
       slb_cache[5]:        = 0x0000000000000000
       slb_cache[6]:        = 0x0000000000000000
       slb_cache[7]:        = 0x0000000000000000
       dscr_default         = 0x0               	(0x58)
       __current            = 0xc000000001331e80	(0x290)
       kstack               = 0xc000000001393e30	(0x298)
       stab_rr              = 0x11              	(0x2a0)
       saved_r1             = 0xc0000001fffef5e0	(0x2a8)
       trap_save            = 0x0               	(0x2b8)
       soft_enabled         = 0x0               	(0x2ba)
       irq_happened         = 0x1               	(0x2bb)
       io_sync              = 0x0               	(0x2bc)
       irq_work_pending     = 0x0               	(0x2bd)
       nap_state_lost       = 0x0               	(0x2be)
       sprg_vdso            = 0x0               	(0x2c0)
       tm_scratch           = 0x8000000100009033	(0x2c8)
       core_idle_state_ptr  = (null)            	(0x2d0)
       thread_idle_state    = 0x0               	(0x2d8)
       thread_mask          = 0x0               	(0x2d9)
       subcore_sibling_mask = 0x0               	(0x2da)
       user_time            = 0x0               	(0x2f0)
       system_time          = 0x0               	(0x2f8)
       user_time_scaled     = 0x0               	(0x300)
       starttime            = 0x3f462418b5cf4   	(0x308)
       starttime_user       = 0x3f4622a57092a   	(0x310)
       startspurr           = 0xd62a5718        	(0x318)
       utime_sspurr         = 0x0               	(0x320)
       stolen_time          = 0x0               	(0x328)
      Signed-off-by: NAnshuman Khandual <khandual@linux.vnet.ibm.com>
      [mpe: Endian swap slb_shadow before display, minor formatting]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      ad987fc8
    • S
      powerpc/xmon: Paginate kernel log buffer display · 0c23a88c
      Sam bobroff 提交于
      The kernel log buffer is often much longer than the size of a terminal
      so paginate it's output.
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      0c23a88c
    • S
      powerpc/xmon: Paged output for paca display · 958b7c80
      Sam bobroff 提交于
      The paca display is already more than 24 lines, which can be problematic
      if you have an old school 80x24 terminal, or more likely you are on a
      virtual terminal which does not scroll for whatever reason.
      
      This patch adds a new command "#", which takes a single (hex) numeric
      argument: lines per page. It will cause the output of "dp" and "dpa"
      to be broken into pages, if necessary.
      
      Sample output:
      
      0:mon> # 10
      0:mon> dp1
      paca for cpu 0x1 @ c00000000fdc0480:
       possible         = yes
       present          = yes
       online           = yes
       lock_token       = 0x8000            	(0x8)
       paca_index       = 0x1               	(0xa)
       kernel_toc       = 0xc000000000eb2400	(0x10)
       kernelbase       = 0xc000000000000000	(0x18)
       kernel_msr       = 0xb000000000001032	(0x20)
       emergency_sp     = 0xc00000003ffe8000	(0x28)
       mc_emergency_sp  = 0xc00000003ffe4000	(0x2e0)
       in_mce           = 0x0               	(0x2e8)
       data_offset      = 0x7f170000        	(0x30)
       hw_cpu_id        = 0x8               	(0x38)
       cpu_start        = 0x1               	(0x3a)
       kexec_state      = 0x0               	(0x3b)
      [Hit a key (a:all, q:truncate, any:next page)]
      0:mon>
       __current        = 0xc00000007e696620	(0x290)
       kstack           = 0xc00000007e6ebe30	(0x298)
       stab_rr          = 0xb               	(0x2a0)
       saved_r1         = 0xc00000007ef37860	(0x2a8)
       trap_save        = 0x0               	(0x2b8)
       soft_enabled     = 0x0               	(0x2ba)
       irq_happened     = 0x1               	(0x2bb)
       io_sync          = 0x0               	(0x2bc)
       irq_work_pending = 0x0               	(0x2bd)
       nap_state_lost   = 0x0               	(0x2be)
      0:mon>
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      [mpe: Use bool, make some variables static]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      958b7c80
  22. 12 8月, 2015 1 次提交
  23. 06 8月, 2015 1 次提交
  24. 19 1月, 2015 1 次提交
  25. 29 12月, 2014 1 次提交
  26. 02 12月, 2014 2 次提交
    • M
      powerpc/xmon: Cleanup the breakpoint flags · abb90ee7
      Michael Ellerman 提交于
      Drop BP_IABR_TE, which though used, does not do anything useful. Rename
      BP_IABR to BP_CIABR. Renumber the flags.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      abb90ee7
    • A
      powerpc/xmon: Enable HW instruction breakpoint on POWER8 · 1ad7d705
      Anshuman Khandual 提交于
      This patch enables support for hardware instruction breakpoint in xmon
      on POWER8 platform with the help of a new register called the CIABR
      (Completed Instruction Address Breakpoint Register). With this patch, a
      single hardware instruction breakpoint can be added and cleared during
      any active xmon debug session. The hardware based instruction breakpoint
      mechanism works correctly with the existing TRAP based instruction
      breakpoint available on xmon.
      
      There are no powerpc CPU with CPU_FTR_IABR feature any more. This patch
      has re-purposed all the existing IABR related code to work with CIABR
      register based HW instruction breakpoint.
      
      This has one odd feature, which is that when we hit a breakpoint xmon
      doesn't tell us we have hit the breakpoint. This is because xmon is
      expecting bp->address == regs->nip. Because CIABR fires on completition
      regs->nip points to the instruction after the breakpoint. We could fix
      that, but it would then confuse other parts of the xmon code which think
      we need to emulate the instruction. [mpe]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NAnshuman Khandual <khandual@linux.vnet.ibm.com>
      1ad7d705
  27. 27 11月, 2014 1 次提交
    • L
      powerpc/pseries: Fix endiannes issue in RTAS call from xmon · 3b8a3c01
      Laurent Dufour 提交于
      On pseries system (LPAR) xmon failed to enter when running in LE mode,
      system is hunging. Inititating xmon will lead to such an output on the
      console:
      
      SysRq : Entering xmon
      cpu 0x15: Vector: 0  at [c0000003f39ffb10]
          pc: c00000000007ed7c: sysrq_handle_xmon+0x5c/0x70
          lr: c00000000007ed7c: sysrq_handle_xmon+0x5c/0x70
          sp: c0000003f39ffc70
         msr: 8000000000009033
        current = 0xc0000003fafa7180
        paca    = 0xc000000007d75e80	 softe: 0	 irq_happened: 0x01
          pid   = 14617, comm = bash
      Bad kernel stack pointer fafb4b0 at eca7cc4
      cpu 0x15: Vector: 300 (Data Access) at [c000000007f07d40]
          pc: 000000000eca7cc4
          lr: 000000000eca7c44
          sp: fafb4b0
         msr: 8000000000001000
         dar: 10000000
       dsisr: 42000000
        current = 0xc0000003fafa7180
        paca    = 0xc000000007d75e80	 softe: 0	 irq_happened: 0x01
          pid   = 14617, comm = bash
      cpu 0x15: Exception 300 (Data Access) in xmon, returning to main loop
      xmon: WARNING: bad recursive fault on cpu 0x15
      
      The root cause is that xmon is calling RTAS to turn off the surveillance
      when entering xmon, and RTAS is requiring big endian parameters.
      
      This patch is byte swapping the RTAS arguments when running in LE mode.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      3b8a3c01
  28. 12 11月, 2014 1 次提交
  29. 03 11月, 2014 1 次提交
    • A
      powerpc: Convert power off logic to pm_power_off · 9178ba29
      Alexander Graf 提交于
      The generic Linux framework to power off the machine is a function pointer
      called pm_power_off. The trick about this pointer is that device drivers can
      potentially implement it rather than board files.
      
      Today on powerpc we set pm_power_off to invoke our generic full machine power
      off logic which then calls ppc_md.power_off to invoke machine specific power
      off.
      
      However, when we want to add a power off GPIO via the "gpio-poweroff" driver,
      this card house falls apart. That driver only registers itself if pm_power_off
      is NULL to ensure it doesn't override board specific logic. However, since we
      always set pm_power_off to the generic power off logic (which will just not
      power off the machine if no ppc_md.power_off call is implemented), we can't
      implement power off via the generic GPIO power off driver.
      
      To fix this up, let's get rid of the ppc_md.power_off logic and just always use
      pm_power_off as was intended. Then individual drivers such as the GPIO power off
      driver can implement power off logic via that function pointer.
      
      With this patch set applied and a few patches on top of QEMU that implement a
      power off GPIO on the virt e500 machine, I can successfully turn off my virtual
      machine after halt.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      [mpe: Squash into one patch and update changelog based on cover letter]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      9178ba29