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  1. 17 3月, 2014 2 次提交
  3. 15 3月, 2014 1 次提交
  5. 03 3月, 2014 1 次提交
  7. 02 3月, 2014 1 次提交
    • L
      iio:adc: Add Xilinx XADC driver · bdc8cda1
      由 Lars-Peter Clausen 提交于 
      The Xilinx XADC is a ADC that can be found in the series 7 FPGAs from Xilinx.
The XADC has a DRP interface for communication. Currently two different
frontends for the DRP interface exist. One that is only available on the ZYNQ
family as a hardmacro in the SoC portion of the ZYNQ. The other one is available
on all series 7 platforms and is a softmacro with a AXI interface. This driver
supports both interfaces and internally has a small abstraction layer that hides
the specifics of these interfaces from the main driver logic.

The ADC has a couple of internal channels which are used for voltage and
temperature monitoring of the FPGA as well as one primary and up to 16 channels
auxiliary channels for measuring external voltages. The external auxiliary
channels can either be directly connected each to one physical pin on the FPGA
or they can make use of an external multiplexer which is responsible for
multiplexing the external signals onto one pair of physical pins.

The voltage and temperature monitoring channels also have an event capability
which allows to generate a interrupt when their value falls below or raises
above a set threshold.

Buffered sampling mode is supported by the driver, but only for AXI-XADC since
the ZYNQ XADC interface does not have capabilities for supporting buffer mode
(no end-of-conversion interrupt). If buffered mode is supported the driver will
register two triggers. One "xadc-samplerate" trigger which will generate samples
with the configured samplerate. And one "xadc-convst" trigger which will
generate one sample each time the CONVST (conversion start) signal is asserted.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>
      bdc8cda1
  9. 26 2月, 2014 1 次提交
  11. 23 2月, 2014 1 次提交
    • L
      iio:event: Fix and cleanup locking · b91accaf
      由 Lars-Peter Clausen 提交于 
      The event code currently holds a spinlock with IRQs disabled while calling
kfifo_to_user(). kfifo_to_user() can generate a page fault though, which means
we have to be able to sleep, which is not possible if the interrupts are
disabled. The good thing is that kfifo handles concurrent read and write access
just fine as long as there is only one reader and one writer, so we do not any
locking to protect against concurrent access from the read and writer thread. It
is possible though that userspace is trying to read from the event FIFO from
multiple concurrent threads, so we need to add locking to protect against this.
This is done using a mutex. The mutex will only protect the kfifo_to_user()
call, it will not protect the waitqueue. This means that multiple threads can be
waiting for new data and once a new event is added to the FIFO all waiting
threads will be woken up. If one of those threads is unable to read any data
(because another thread already read all the data) it will go back to sleep. The
only remaining issue is that now that the clearing of the BUSY flag and the
emptying of the FIFO does no longer happen in one atomic step it is possible
that a event is added to the FIFO after it has been emptied and this sample will
be visible the next time a new event file descriptor is created. To avoid this
rather move the emptying of the FIFO from iio_event_chrdev_release to
iio_event_getfd().
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>
      b91accaf
  13. 22 2月, 2014 3 次提交
  15. 18 2月, 2014 7 次提交
  17. 15 2月, 2014 3 次提交
  19. 08 2月, 2014 9 次提交
  21. 04 2月, 2014 3 次提交
  23. 18 1月, 2014 1 次提交
  25. 13 1月, 2014 1 次提交
  27. 12 1月, 2014 1 次提交
  29. 11 1月, 2014 5 次提交