- 30 4月, 2014 13 次提交
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由 Fabio Estevam 提交于
Like other imx SoCs only one USB clock is needed on mx25. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Cosmin Stoica 提交于
The kernel was not able to boot from SD card because sdhc support was not present into the dts. A new entry for sdhc1 was added for vf610-twr board based on the compatible entry present on imx53. After applying these changes, the kernel is able to boot successfully from SD card. Signed-off-by: NCosmin Stoica <cosminstefan.stoica@freescale.com> Signed-off-by: NChircu Bogdan <Bogdan.Chircu@freescale.com> Signed-off-by: NEddy Petrisor <eddy.petrisor@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
GPIO4_8 is connected to the Ethernet PHY reset line, so populate the 'phy-reset-gpios' property accordingly. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
GPIO2_3 controls the power to the Ethernet PHY, so provide a regulator node for this. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
Instead of relying on the bootloader for configuring the FEC pins, pass the FEC pin configuration via device tree instead. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
UART1 is the console port on mx25pdk board. Add the pin configuration for UART1 port and also pass 'fsl,uart-has-rtscts' to indicate that the port has RTS and CTS pins. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
Keep the dt nodes sorted for better readability. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Vincent Stehlé 提交于
Make the red gpio led available to the user. This can be toggled with the sysfs for example, or used as a heartbeat or mmc activity light by changing the trigger. Signed-off-by: NVincent Stehlé <vincent.stehle@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds pin group for Synchronous Serial Interface 1 (SSI1) for PCM-038 module and enables this interface. This change do nothing at the current stage but helps to continue develop sound support. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds missing pinctrl definition for SPI chipselect 1. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Marek Vasut 提交于
Add alias for FEC ethernet on i.MX to allow bootloaders (like U-Boot) patch-in the MAC address for FEC using this alias. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Denis Carikli 提交于
Cc: Eric Bénard <eric@eukrea.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NDenis Carikli <denis@eukrea.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 24 4月, 2014 2 次提交
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由 Stephen Warren 提交于
Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth UART, but this appears to be left-over from earlier SoC documentation. Remove the non-existent DT node for UART5. Cc: <stable@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Domenico Andreoli 提交于
Few things were out of order: - removed ARCH_BCM2835 duplicate - shuffled ARCH_BCM_5301X, ARCH_U8500 and ARCH_U300 around so to keep the list sorted Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-by: NDomenico Andreoli <domenico.andreoli@linux.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 22 4月, 2014 2 次提交
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由 Soren Brinkmann 提交于
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Soren Brinkmann 提交于
Specify the 'clock-latency' property to avoid certain cpufreq governors from refusing to work with the following error: ondemand governor failed, too long transition latency of HW, fallback to performance governor Reported-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 19 4月, 2014 9 次提交
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由 Robert Nelson 提交于
BeagleBoard xM A/B has an inverted usb hub enable line vs the xM C Signed-off-by: NRobert Nelson <robertcnelson@gmail.com> [tony@atomide.com: updated for missing bracket] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Viresh Kumar 提交于
shiraz.hashim@st.com email-id doesn't exist anymore as he has left the company. Replace ST's id with shiraz.linux.kernel@gmail.com. It also updates .mailmap file to fix address for 'git shortlog'. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Leigh Brown 提交于
In "ARM: dts: am33xx: correcting dt node unit address for usb", the usb_ctrl_mod and cppi41dma nodes were updated with the correct register addresses. However, the dts files that reference these nodes were not updated, and those devices are no longer being enabled. This patch corrects the references for the affected dts files. Signed-off-by: NLeigh Brown <leigh@solinno.co.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Johan Hovold 提交于
Remove all remaining uses of gpmc,device-nand that have been added since the property was removed by commit f40739fa ("ARM: dts: OMAP2+: Simplify NAND support"). Signed-off-by: NJohan Hovold <jhovold@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wolfram Sang 提交于
Wrong documentation in pinmux description can be especially confusing. Keep it proper. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
The correct bit is 24 for AHCLKX. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
The USB3 PHY driver (ti-pipe3) was updated so that the relevant clock phandles are expected in the DT node. Provide the necessary clocks. Reported-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 4月, 2014 4 次提交
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由 Max Schwarz 提交于
The default behaviour of the uart-rx pins on the rk3188 is to be pulled up and a lot of designs use diodes to even prevent them from being raised from the outside. Therefore change the rx-pin settings accordingly. This also fixes a uart receive problem on mass production Radxa Rock boards. Signed-off-by: NMax Schwarz <max.schwarz@online.de> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Magnus Damm 提交于
Fix typo of renesas,groups in the koeslch dt. The kernel has no renesas,gpios but this should match renesas,groups. Noticed thanks to similar fix for Lager by Rob Taylor and Ben Dooks. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Lucas Stach 提交于
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Lucas Stach 提交于
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 4月, 2014 10 次提交
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由 Shawn Guo 提交于
Per bindings of fixed-clock, #clock-cells is a required property. Let's add it for those fixed rate clocks. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Lucas Stach 提交于
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Fabio Estevam 提交于
In case the bootloader has incorrectly configured the ALT mode of MX6SL_PAD_ECSPI1_SS0 pad, we end up with the following probe error: m25p80 spi0.0: found mr25h256, expected m25p32 m25p80 spi0.0: mr25h256 (32 Kbytes) In order to avoid this issue, add an entry for MX6SL_PAD_ECSPI1_SS0 pad, so that kernel configures the ECSPI chip select as GPIO functionality, which results in correct SPI NOR probe. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Lothar Waßmann 提交于
The 'remote-endpoint' property should point back to ipu_di1_lvds1 rather than ipu_di0_lvds0. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since commit (655b43cc staging: imx-drm-core: Use OF graph to find components and connections between encoder and crtcs), 'crtcs' becomes a dead property. Remove it. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Acked-by: NTim Harvey <tharvey@gateworks.com>
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由 Shawn Guo 提交于
With the recent imx-drm device tree binding changes, we need to add IPU DI ports and endpoints for adapting. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Acked-by: NLothar Waßmann <LW@KARO-electronics.de>
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由 Lucas Stach 提交于
Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Lucas Stach 提交于
Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Sascha Hauer 提交于
GPIO7_12 switches the D+/D- USB lines on and off. When we use this as VBUS regulator it means that USB device mode can never work as VBUS is never turned on in Device mode. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Lucas Stach 提交于
Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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