Hook these platforms restart code into the new restart hook rather
than using arch_reset().
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Boards used to specify zreladdr in their Makefile.boot with
zreladdr-y := x, so conflicting zreladdrs were silently overwritten.
This patch changes this to zreladdr-y += x, so that we end
up with multiple words in zreladdr in such a case. We can
detect this later and complain if necessary.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use.  Let's give their
addruart macro some slack by providing an extra work register which will
allow for much needed cleanups.

This is basically a no-op as this commit is only adding the extra argument
to the macro but no one is using it yet.
Signed-off-by: Nnicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NKevin Hilman <khilman@ti.com>

commit d5341942 ("PCI: Make the struct
pci_dev * argument of pci_fixup_irqs const") did not change argument
of pdev_to_cnspci(), and thus introduced the following warnings:

  CHECK   arch/arm/mach-cns3xxx/pcie.c
pcie.c:177:60: warning: incorrect type in argument 1 (different modifiers)
pcie.c:177:60:    expected struct pci_dev *dev
pcie.c:177:60:    got struct pci_dev const *dev
  CC      arch/arm/mach-cns3xxx/pcie.o
pcie.c: In function 'cns3xxx_pcie_map_irq':
pcie.c:177: warning: passing argument 1 of 'pdev_to_cnspci' discards qualifiers from pointer target type
pcie.c:52: note: expected 'struct pci_dev *' but argument is of type 'const struct pci_dev *'

This patch fixes the issue.
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

Commit c9d95fbe "ARM: convert PCI defines
to variables" deleted cns3xxx' hardware.h, but didn't remove references
for it, so do it now.

This patch removes lines that refer to hardware.h.
Signed-off-by: NTommy Lin <tommy.lin.1101@gmail.com>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This allows us to move duplicated code in <asm/atomic.h>
(atomic_inc_not_zero() for now) to <linux/atomic.h>
Signed-off-by: NArun Sharma <asharma@fb.com>
Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Aside of the usual motivation for constification,  this function has a
history of being abused a hook for interrupt and other fixups so I turned
this function const ages ago in the MIPS code but it should be done
treewide.

Due to function pointer passing in varous places a few other functions
had to be constified as well.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
To: Anton Vorontsov <avorontsov@mvista.com>
To: Chris Metcalf <cmetcalf@tilera.com>
To: Colin Cross <ccross@android.com>
Acked-by: N"David S. Miller" <davem@davemloft.net>
To: Eric Miao <eric.y.miao@gmail.com>
To: Erik Gilling <konkers@android.com>
Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn>
To: "H. Peter Anvin" <hpa@zytor.com>
To: Imre Kaloz <kaloz@openwrt.org>
To: Ingo Molnar <mingo@redhat.com>
To: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Krzysztof Halasa <khc@pm.waw.pl>
To: Lennert Buytenhek <kernel@wantstofly.org>
To: Matt Turner <mattst88@gmail.com>
To: Nicolas Pitre <nico@fluxnic.net>
To: Olof Johansson <olof@lixom.net>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
To: Richard Henderson <rth@twiddle.net>
To: Russell King <linux@arm.linux.org.uk>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-alpha@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-pci@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: sparclinux@vger.kernel.org
Cc: x86@kernel.org
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow
multi-platform builds. This also removes the requirement for a platform to
have a mach/hardware.h.

The default values for i/o and mem are 0x1000 and 0x01000000, respectively.
Per Arnd Bergmann, other values are likely to be incorrect, but this commit
does not try to address that issue.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Convert pcibios_assign_all_busses from a define to inline so platforms can
control this setting.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Remove some includes of mach/hardware.h which are not needed. hardware.h
will be removed completely for tegra and cns3xxx in follow on patch.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NBarry Song <baohua.song@csr.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

CNS3xxx SOCs have L310-compatible cache controller, so let's use it.

With this patch benchmarking with 'gzip' shows that performance is
doubled, and I'm still able to boot full-fledged userland over NFS
(using PCIe NIC), so the support should be pretty robust.

p.s. While CNS3xxx reports that it has PL310, it still needs to wait
on cache line operations, so we should not select 'CACHE_PL310',
which is a micro-optimization that removes these waits for v7 CPUs.
Someday we'd better rename CACHE_PL310 Kconfig option into
NO_CACHE_WAIT or something less ambiguous.
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NWan ZongShun <mcuos.com@gmail.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: NJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr.  Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.
Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.
Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.
Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Use the GIC demux code in asm/hardware/entry-macro-gic.S
on the CNS3XXX subarchitecture.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Today more boards with arm cpu have selectable pci bus.
This patch makes this more scalable and remove line continuations in
Kconfig
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NHans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

commit 6338a6aa ("ARM: 6269/1: Add 'code'
parameter for hook_fault_code()") breaks CNS3xxx build:

  CC      arch/arm/mach-cns3xxx/pcie.o
pcie.c: In function 'cns3xxx_pcie_init':
pcie.c:373: warning: passing argument 4 of 'hook_fault_code' makes integer from pointer without a cast
pcie.c:373: error: too few arguments to function 'hook_fault_code'

This commit fixes the small issue.

Cc: stable@kernel.org [36]
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

This patch add plateform_device for EHCI and OHCI controller on CNS3XXX.
Power reference count (usb_pwr_ref) is used to control enabling and
disabling the single clock control for both EHCI and OHCI controller.

It also removes EHCI/OHCI unused virtual address definitions.
Signed-off-by: NMac Lin <mkl0301@gmail.com>
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

This patch adds cns3xxx_pwr_clk_dis, and exports these power management
functions that may be used by many other device drivers on CNS3XXX.
Signed-off-by: NMac Lin <mkl0301@gmail.com>
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

commit 6eb5d146 ("ARM: cns3xxx: Use IO memory accessors everywhere")
breaks cns3xxx_pwr_soft_rst_force() function, so that it doesn't write
cleared bit into the register.

This patch fixes the issue by adding the necessary __raw_writel().
Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>

Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>

CNS3xxx chips have AHCI-compatible SATA controller. This patch adds
the support using generic ahci_platform driver.
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

CNS3xxx chips have SDHCI-compatible SDIO/SD/MMC controller. This patch
adds the support using sdhci-cns3xxx driver.
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

This patch adds PCIe support for CNS3xxx-based boards. The support
was tested with a directly attached SKY2 NIC, and EHCI USB controller
behind the PLX PEX8112 P2P bridge (to make sure that type1 cfg cycles
work as expected).
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

Before it isn't too late let's switch to IO memory accessors.
This patch converts all current _REG users and _REG definitions.
There should be no functional changes.
Suggested-by: NBen Dooks <ben-linux@fluff.org>
Suggested-by: NSergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

This patch adds support for CNS3420VB rev 1.3 boards. With this patch
CNS3420VB boards are able to boot up to the userspace, with a console
available on UART0.
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>

This patch adds very basic support for ECONA CNS3xxx ARM11 MPcore
(ARMv6) dual-core processors.

Note that SMP is not yet supported, as well as many peripheral
devices. Support for these features will be added later.
Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>