1. 09 8月, 2017 4 次提交
  2. 21 6月, 2017 1 次提交
  3. 19 5月, 2017 1 次提交
  4. 13 4月, 2017 1 次提交
  5. 28 1月, 2017 5 次提交
  6. 31 8月, 2016 2 次提交
  7. 12 5月, 2016 1 次提交
  8. 26 4月, 2016 1 次提交
    • M
      wil6210: prevent deep sleep of 60G device in critical paths · 349214c1
      Maya Erez 提交于
      In idle times 60G device can enter deep sleep and turn off
      its XTAL clock.
      Host access triggers the device power-up flow which will hold
      the AHB during XTAL stabilization until device switches from
      slow-clock to XTAL clock.
      This behavior can stall the PCIe bus for some arbitrary period
      of time.
      In order to prevent this stall, host can vote for High Latency
      Access Policy (HALP) before reading from PCIe bus.
      This vote will wakeup the device from deep sleep and prevent
      deep sleep until unvote is done.
      Signed-off-by: NMaya Erez <qca_merez@qca.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      349214c1
  9. 04 4月, 2016 1 次提交
  10. 07 3月, 2016 3 次提交
  11. 02 2月, 2016 1 次提交
  12. 04 1月, 2016 1 次提交
  13. 09 10月, 2015 1 次提交
  14. 11 9月, 2015 1 次提交
  15. 06 8月, 2015 4 次提交
  16. 09 6月, 2015 1 次提交
  17. 05 5月, 2015 2 次提交
  18. 20 3月, 2015 1 次提交
  19. 13 3月, 2015 1 次提交
  20. 03 3月, 2015 1 次提交
  21. 27 2月, 2015 4 次提交
  22. 15 1月, 2015 2 次提交
    • V
      wil6210: relax spinlocks in rx reorder · bd33273b
      Vladimir Kondratiev 提交于
      In the Rx reorder mechanism, nothing is done in the interrupt
      context, so there is no need to use 'irq' flavors of spinlock.
      Rx done in NAPI context (tasklet), other manipulations - in the
      thread context.
      
      Having interrupts enabled makes it better for the OS in general.
      Besides, if enslaved under bonding, bridge or team driver, Rx
      won't work with interrupts disabled.
      Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
      bd33273b
    • V
      wil6210: add advanced interrupt moderation · 78366f69
      Vladimir Kondratiev 提交于
      Add advanced interrupt moderation support available since "Sparrow B0".
      Legacy interrupt moderation used only one counter to moderate tx, rx,
      and misc interrupts.
      Advanced interrupt moderation bypasses misc, and handles separately tx
      and rx interrupts. In addition it has two timers for each interrupt type.
      Max burst duration timer which defines how long to postpone interrupt after
      first event (receive event for rx and tx complete event for tx), and
      interframe timeout which defines how to determine the end of the burst and
      issue interrupt even if the first timer still pending.
      Capabilities flags in wil_priv is set on initialization according to
      HW. The rest of the code checks for advanced interrupt capability bit
      in capabilities flags field.
      Debugfs is split accordingly: "legacy" interrupt moderation remains
      unchanged, new debugs files added for advanced interrupt moderation
      support.
      Module params are aligned to support advanced interrupt moderation
      (tx & rx). When not available (for legacy interrupt moderation) will
      use only rx configuration; Tx configuration will be ignored in this
      case.
      Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
      78366f69