- 15 11月, 2011 2 次提交
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由 Haojian Zhuang 提交于
Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x. So use dummy clk instead. And move the gpio edge initialization into gpio driver for arch-mmp. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
Remove most gpio macros and change gpio driver to platform driver. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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- 14 11月, 2011 5 次提交
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由 Haojian Zhuang 提交于
Remove the code of accessing gpio register. Use the generic read operation instead. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
NR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
Avoid to define gpio_to_irq() and irq_to_gpio() for potential name confliction since multiple architecture will be built together. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
GPIO0 and GPIO1 are linked to unique interrupt line in PXA series, others are linked to another interrupt line. All GPIO are linked to one interrupt line in MMP series. Since gpio driver is shared between PXA series and MMP series, define GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code from irq.c to gpio-pxa.c. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Haojian Zhuang 提交于
Avoid potential naming confliction since multiple architecture will be built in a single kernel. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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- 06 11月, 2011 9 次提交
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由 Kukjin Kim 提交于
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Marc Zyngier 提交于
MCT recently gained per cpu interrupts, and missed the fact that ARM has moved to a genirq based implementation. This patch converts the driver to the new API. Boot tested on Origen. Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Joonyoung Shim 提交于
PWM timers use pclk("timers" clk) as parent clk. If this pclk is the disabled state when PWM driver is probed, then it causes wrong read and write operation about registers of PWM. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Jonghwan Choi 提交于
Fix following build error. arch/arm/plat-samsung/dev-backlight.c: In function 'samsung_bl_set': arch/arm/plat-samsung/dev-backlight.c:145: error: implicit declaration of function 'kfree' Signed-off-by: NJonghwan Choi <jhbird.choi@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Russell King 提交于
A mismerge in 43872fa7 (Merge branch 'depends/rmk/gpio' into next/fixes) causes these build errors: In file included from arch/arm/mach-pxa/include/mach/gpio.h:30, from arch/arm/include/asm/gpio.h:6, from include/linux/gpio.h:31, from arch/arm/mach-pxa/generic.c:20: arch/arm/mach-pxa/include/mach/gpio-pxa.h: In function ■__gpio_is_occupied■: arch/arm/mach-pxa/include/mach/gpio-pxa.h:121: error: invalid operands to binary >> (have ■void *■ and ■unsigned int■) arch/arm/mach-pxa/include/mach/gpio-pxa.h:122: error: invalid operands to binary & (have ■void *■ and ■int■) arch/arm/mach-pxa/include/mach/gpio-pxa.h:129: error: invalid operands to binary & (have ■void *■ and ■int■) So fix them. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
When breaking apart the DaVinci GPIO files I accidentally marked it non-complex while it is indeed complex. Reported-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kukjin Kim 提交于
This reverts commit 4bd0fe1c. This implementation can introduce a problem and 'ARM: SMP: fix per cpu timer setup before the cpu is marked online' patch can solve the cpu_oneline vs. cpu_active problem so that should be reverted. Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Fix: WARNING: vmlinux.o(.text+0x1a820): Section mismatch in reference from the function eseries_register_clks() to the function .init.text:clkdev_add_table() The function eseries_register_clks() references the function __init clkdev_add_table(). This is often because eseries_register_clks lacks a __init annotation or the annotation of clkdev_add_table is wrong. by adding the __init annotation to eseries_register_clks() - this function is only called from other __init-marked functions. While we're here, mark it static as it's only called from within eseries.c. Acked-by: NEric Miao <eric.y.miao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kukjin Kim 提交于
The mark of conflict should be removed. This happened at the commit fba95699 ("Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma") Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> [ I always check the conflict resolution with "git diff" before I add the result, but I clearly missed that this time, and didn't notice the second conflict in that file after having fixed the first one. Oops, my bad. - Linus ] Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 05 11月, 2011 8 次提交
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由 Guennadi Liakhovetski 提交于
ag5evm implements a backlight control, using an I2C controller, therefore it needs CONFIG_I2C to fix this make failure arch/arm/mach-shmobile/built-in.o: In function `lcd_on': pfc-sh73a0.c:(.text+0x2334): undefined reference to `i2c_get_adapter' pfc-sh73a0.c:(.text+0x2370): undefined reference to `i2c_transfer' (ignore pfc-sh73a0.c) and to build successfully. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Support PINT on sh73a0 and AG5EVM using INTC PINT macros. With this patch applied the AG5EVM ethernet is handled through one of the chained sh73a0 PINT interrupt controllers. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add a INTC_PINT() macro with various helper bits to allow SoCs like sh73a0 to suppor the PINT hardware using regular INTC tables. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Implement GPIO hotplugging via TMIO_MMC_HAS_COLD_CD for AG5EVM SDHI0. This is possible now when INTCA is used for IRQ triggering on sh73a0. Without INTCA IRQ support we are left with the GIC hardware block that does not support dealing with active low interrupt sources. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Improve IRQ triggering support by making use of the macro INTC_IRQ_PINS_32() for INTCA on sh73a0. Unfortunately it is not as easy as just using the macro as-is, we need to do mask and unmaks in the GIC but configure other bits and ack in INTCA. Update GPIO IRQ mappings while at it. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_32() for INTCA on sh7372. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_32() for INTCA on sh7377. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_16() for INTCA on sh7367. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 04 11月, 2011 16 次提交
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由 Magnus Damm 提交于
This patch adds support for sh73a0 GPIO IRQs by making use of the PFC GPIO IRQ feature. Only IRQ pins are supported at this time. In the future when PINT interrupts also are supported properly we can easily extend the table with such information. Also, the sh73a0 is currently making use of the GIC for external interrupt which is rather unflexible when it comes to triggering configuration at this point. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Bastian Hecht 提交于
Always use CS0 shadow area for NOR flash instead of regular CS0 memory area on ap4evb. When booting from CS0 NOR Flash the regular CS0 memory area is available, but when booting via USB the MASK ROM gets mapped to 0x0 which gets in the way for the NOR Flash. Always using CS0 shadow area works well for both NOR Flash boot and USB boot. Signed-off-by: NBastian Hecht <hechtb@gmail.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Always use CS0 shadow area for NOR flash instead of regular CS0 memory area on Mackerel. When booting from CS0 NOR Flash the regular CS0 memory area is available, but when booting via USB the MASK ROM gets mapped to 0x0 which gets in the way for the NOR Flash. Always using CS0 shadow area works well for both NOR Flash boot and USB boot. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add INTC_IRQ_PINS_16() and INTC_IRQ_PINS_32() to mach/intc.h. These macros define 16 or 32 external IRQ pins on a certain memory base address. Can be used with INTCA or INTCS. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Chris Metcalf 提交于
The kernel code was using some <asm> headers that included a mix of hardware-specific information (typically found in Tilera <arch> headers) and structures, enums, and function declarations supporting the disassembly function of the tile-desc.c sources. This change refactors that code so that a hardware-specific, but OS- and application-agnostic header, is created: <arch/opcode.h>. This header is then exported to userspace along with the other <arch> headers and can be used to build userspace code; in particular, it is used by glibc as part of implementing the backtrace() function. The new header, together with a header that specifically describes the disassembly code (<asm/tile-desc.h> with _32 and _64 variants), replaces the old <asm/opcode-tile*.h> and <asm/opcode_constants*.h> headers. As part of this change, we are also renaming the 32-bit constants from TILE_xxx to TILEPRO_xxx to better reflect the fact that they are specific to the TILEPro architecture, and not to TILE-Gx and any successor "tile" architecture chips. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
These headers are similar to the <asm> headers that describe kernel APIs, but instead describe aspects of the actual hardware in an OS- and application-independent manner. We need to include them in the set of installed headers so that userspace tools (including glibc) can build purely from the provided kernel headers. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
An earlier Tilera compiler generated calls to an "__ll_mul" function for long long multiplication. Our libgcc supported that as an alias for the normal __muldi3 routine, so we made it available to kernel modules as well. However, for a while now the compiler has internally been generating only the standard __muldi3 symbol, and the version we are giving back to the community does not have the __ll_mul alias, so we are removing it from the kernel too. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
<asm/sigcontext.h> is used by glibc's <bits/sigcontext.h> from <signal.h>, which means that it can't clutter the namespace with random symbols or #defines. However, we use <arch/abi.h> to get a suitable type to hold a machine register. This change makes <arch/abi.h> safe to use in this kind of context if __need_int_reg_t is defined prior to including the file; in that case, it only defines a few symbols that are safe in the ISO namespace (prefixed with double underscores). <asm/sigcontext.h> then uses the __uint_reg_t type instead of the normal uint_reg_t. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Guennadi Liakhovetski 提交于
The sh_mobile_ceu_camera driver has been converted to use the V4L2 subdevice .[gs]_mbus_config() operations, therefore we don't need SOCAM_* flags for the soc_camera_platform driver anymore. Remove them. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
The ov772x driver only supports 8 bits per sample pixel codes, hence the OV772X_FLAG_8BIT flag has no effect. Remove it. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
The sh_mobile_ceu_camera driver has been converted to use the V4L2 subdevice .[gs]_mbus_config() operations, therefore we don't need SOCAM_* flags for the soc_camera_platform driver anymore. The ov772x driver only supports 8 bits per sample pixel codes, hence the OV772X_FLAG_8BIT flag has no effect. Remove both of them. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
Camera-switching GPIOs are provided by a i2c GPIO extender, switching them can send the caller to sleep. Use the GPIO API *_cansleep methods explicitly to avoid runtime warnings. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
Prepare the board to switch to the new subdevice media-bus configuration operations. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
Prepare the board to switch to the new subdevice media-bus configuration operations. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
The sh_mobile_csi2 driver will change meaning of the .lanes platform data field from "bitmask of used lanes" to "number of used lanes." To avoid a regression during this transition switch ap4evb to rely on the 2 lane default. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Shengzhou Liu 提交于
The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC. The P3060 Processor combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM Ethernet: - 4x1G + 4x1G/2.5G Ethernet controllers - 2xRGMII + 1xMII, three VSC8641 PHYs on board - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports up to four UARTs RapidIO: Supports two serial RapidIO ports Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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