- 28 10月, 2010 31 次提交
-
-
由 Akira Takeuchi 提交于
Make the settings of interrupt priorities used by various services configurable at run time. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Optimise do_csum() to gang up the loads so they're less likely to get interruptions between. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Mark Salter 提交于
Implement atomic ops using the atomic ops unit available in the AM34 CPU. This allows the equivalent of the LL/SC instructions to be found on other CPUs. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Make the FPU operate in non-lazy mode under SMP so that when the process that is currently using the FPU migrates to a different CPU, we don't have to ping its previous CPU to flush the FPU context. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control as the bits are a more suitable layout. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Make controllable the use of the PIDR register to mark TLB entries as belonging to particular processes. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Rename __flush_tlb*() to local_flush_tlb*() as it's more appropriate, and ready to differentiate local from global TLB flushes when SMP is introduced. Whilst we're at it, get rid of __flush_tlb_global() and make local_flush_tlb_page() take an mm_struct pointer rather than VMA pointer. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
An AM34 erratum requires MMUCTR read and write on entry to certain exceptions, prior to EPSW.NMID being cleared to allow NMIs to happen. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Make the boot wrapper able to use writeback caching, including flushing the cache before jumping to the main kernel. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Implement SMP global cache flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
The AM34 core is able to do cache snooping, and so can skip some of the cache flushing. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
The AM34 CPU core provides an automated way of purging the cache rather than manually iterating over all the tags in the cache. Make it possible to use these. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Differentiate local cache flushing from global cache flushing so that they can be done differently on SMP systems. Rename the cache functions from: mn10300_[id]cache_*() to: mn10300_[id]_localcache_*() and on a UP system, assign the global labels to the local labels. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
The functions that perform cache flushing should take addresses of unsigned long type, not unsigned int. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
The current cache flush and invalidate routines operate by controlling the cache tag registers. Rename the files and add config items to select them. This makes it easier to support the use of other cache flush methods instead, such as the use of AM34's area purge registers, if available. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Reorder asm/cacheflush.h to put arch primitives first, before the main functions so that the main functions can be inline asm rather than #defines when non-trivial. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Provide a MN10300_CACHE_ENABLED config option as inverted logic of MN10300_CACHE_DISABLED to make things simpler. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Split the cache bits out of arch/mn10300/Kconfig as they're quite complex. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Remove the monitor trap function and the set_jtag_stub function as they're not really necessary. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Add CPU register declarations for the AM34 subarch. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Don't hard code the cacheline size in the cache control register definitions. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Move the DMA engine control register definitions to the MN103E010 processor directory so that the MN2WS0050 processor can have its own. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Differentiate AM33_2 and AM33_3 CPU cores in configuration. The MN103E010 processor contains an AM33_2 core. Whilst we're at it, prepare for AM34-based stuff by declaring AM34_2 too. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
The local_irq_disable() function and co. merely raise the interrupt mask on the MN10300 arch to exclude normal interrupts. This still lets other, higher priority maskable interrupts through, such as are used to service gdbstub's serial port and the MN10300 on-chip serial port virtual FIFOs. Provide functions to allow the maskable interrupts to be fully disabled, which will exclude those interrupts. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Add reads[bwl]() and writes[bwl]() for MN10300. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Akira Takeuchi 提交于
Don't cast away the volatile in test_bit()'s parameter when we change its type from const volatile void * so that we can dereference it. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Prevent cnt32_to_63() from being preempted in sched_clock() because it may read its internal counter, get preempted, get delayed for more than the half period of the 'TSC' and then write the internal counter, thus corrupting it. Whilst some callers of sched_clock() have interrupts disabled or hold spinlocks, not all do, and so preemption must be held here. Note that sched_clock() is called from lockdep, but that shouldn't be a problem because although preempt_disable() calls into lockdep, lockdep has a recursion counter to deal with this. Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 David Howells 提交于
Instead of open-coding pci_find_parent_resource and request_resource, just call pci_claim_resource. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Justin Chen 提交于
Change the index to unsigned long in all bitops for [mn10300] Signed-off-by: NJustin Chen <justin.chen@hp.com> Reviewed-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
由 Stoyan Gaydarov 提交于
Signed-off-by: NStoyan Gaydarov <stoyboyker@gmail.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
-
- 27 10月, 2010 2 次提交
-
-
由 Peter Zijlstra 提交于
Since we no longer need to provide KM_type, the whole pte_*map_nested() API is now redundant, remove it. Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Rik van Riel <riel@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Peter Zijlstra 提交于
Keep the current interface but ignore the KM_type and use a stack based approach. The advantage is that we get rid of crappy code like: #define __KM_PTE \ (in_nmi() ? KM_NMI_PTE : \ in_irq() ? KM_IRQ_PTE : \ KM_PTE0) and in general can stop worrying about what context we're in and what kmap slots might be appropriate for that. The downside is that FRV kmap_atomic() gets more expensive. For now we use a CPP trick suggested by Andrew: #define kmap_atomic(page, args...) __kmap_atomic(page) to avoid having to touch all kmap_atomic() users in a single patch. [ not compiled on: - mn10300: the arch doesn't actually build with highmem to begin with ] [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c] Acked-by: NRik van Riel <riel@redhat.com> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Airlie <airlied@linux.ie> Cc: Li Zefan <lizf@cn.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 26 10月, 2010 1 次提交
-
-
由 David Howells 提交于
In the MN10300 arch, we occasionally see an assertion being tripped in alloc_cwqs() at the following line: /* just in case, make sure it's actually aligned */ ---> BUG_ON(!IS_ALIGNED(wq->cpu_wq.v, align)); return wq->cpu_wq.v ? 0 : -ENOMEM; The values are: wa->cpu_wq.v => 0x902776e0 align => 0x100 and align is calculated by the following: const size_t align = max_t(size_t, 1 << WORK_STRUCT_FLAG_BITS, __alignof__(unsigned long long)); This is because the pointer in question (wq->cpu_wq.v) loses some of its lower bits to control flags, and so the object it points to must be sufficiently aligned to avoid the need to use those bits for pointing to things. Currently, 4 control bits and 4 colour bits are used in normal circumstances, plus a debugging bit if debugging is set. This requires the cpu_workqueue_struct struct to be at least 256 bytes aligned (or 512 bytes aligned with debugging). PERCPU() alignment on MN13000, however, is only 32 bytes as set in vmlinux.lds.S. So we set this to PAGE_SIZE (4096) to match most other arches and stick a comment in alloc_cwqs() for anyone else who triggers the assertion. Reported-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NMark Salter <msalter@redhat.com> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 23 10月, 2010 1 次提交
-
-
由 Jeff Mahoney 提交于
This patch converts mn10300 to use asm-generic/ioctls.h instead of its own version. The differences between the arch-specific version and the generic version are as follows: - The generic version provides TIOCGRS485 and TIOCSRS485 but they are unused by any driver available for this architecture. - The generic version adds support for termiox Cc: David Howells <dhowells@redhat.com> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Signed-off-by: NJeff Mahoney <jeffm@suse.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
-
- 07 10月, 2010 1 次提交
-
-
由 David Howells 提交于
Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration, it maps: local_irq_enable() -> raw_local_irq_enable() local_irq_disable() -> raw_local_irq_disable() local_irq_save() -> raw_local_irq_save() ... and under the other configuration, it maps: raw_local_irq_enable() -> local_irq_enable() raw_local_irq_disable() -> local_irq_disable() raw_local_irq_save() -> local_irq_save() ... This is quite confusing. There should be one set of names expected of the arch, and this should be wrapped to give another set of names that are expected by users of this facility. Change this to have the arch provide: flags = arch_local_save_flags() flags = arch_local_irq_save() arch_local_irq_restore(flags) arch_local_irq_disable() arch_local_irq_enable() arch_irqs_disabled_flags(flags) arch_irqs_disabled() arch_safe_halt() Then linux/irqflags.h wraps these to provide: raw_local_save_flags(flags) raw_local_irq_save(flags) raw_local_irq_restore(flags) raw_local_irq_disable() raw_local_irq_enable() raw_irqs_disabled_flags(flags) raw_irqs_disabled() raw_safe_halt() with type checking on the flags 'arguments', and then wraps those to provide: local_save_flags(flags) local_irq_save(flags) local_irq_restore(flags) local_irq_disable() local_irq_enable() irqs_disabled_flags(flags) irqs_disabled() safe_halt() with tracing included if enabled. The arch functions can now all be inline functions rather than some of them having to be macros. Signed-off-by: David Howells <dhowells@redhat.com> [X86, FRV, MN10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [Tile] Signed-off-by: Michal Simek <monstr@monstr.eu> [Microblaze] Tested-by: Catalin Marinas <catalin.marinas@arm.com> [ARM] Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> [AVR] Acked-by: Tony Luck <tony.luck@intel.com> [IA-64] Acked-by: Hirokazu Takata <takata@linux-m32r.org> [M32R] Acked-by: Greg Ungerer <gerg@uclinux.org> [M68K/M68KNOMMU] Acked-by: Ralf Baechle <ralf@linux-mips.org> [MIPS] Acked-by: Kyle McMartin <kyle@mcmartin.ca> [PA-RISC] Acked-by: Paul Mackerras <paulus@samba.org> [PowerPC] Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [S390] Acked-by: Chen Liqin <liqin.chen@sunplusct.com> [Score] Acked-by: Matt Fleming <matt@console-pimps.org> [SH] Acked-by: David S. Miller <davem@davemloft.net> [Sparc] Acked-by: Chris Zankel <chris@zankel.net> [Xtensa] Reviewed-by: Richard Henderson <rth@twiddle.net> [Alpha] Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> [H8300] Cc: starvik@axis.com [CRIS] Cc: jesper.nilsson@axis.com [CRIS] Cc: linux-cris-kernel@axis.com
-
- 06 10月, 2010 1 次提交
-
-
由 Linus Torvalds 提交于
With all the recent module loading cleanups, we've minimized the code that sits under module_mutex, fixing various deadlocks and making it possible to do most of the module loading in parallel. However, that whole conversion totally missed the rather obscure code that adds a new module to the list for BUG() handling. That code was doubly obscure because (a) the code itself lives in lib/bugs.c (for dubious reasons) and (b) it gets called from the architecture-specific "module_finalize()" rather than from generic code. Calling it from arch-specific code makes no sense what-so-ever to begin with, and is now actively wrong since that code isn't protected by the module loading lock any more. So this commit moves the "module_bug_{finalize,cleanup}()" calls away from the arch-specific code, and into the generic code - and in the process protects it with the module_mutex so that the list operations are now safe. Future fixups: - move the module list handling code into kernel/module.c where it belongs. - get rid of 'module_bug_list' and just use the regular list of modules (called 'modules' - imagine that) that we already create and maintain for other reasons. Reported-and-tested-by: NThomas Gleixner <tglx@linutronix.de> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Adrian Bunk <bunk@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: stable@kernel.org Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 02 10月, 2010 1 次提交
-
-
由 David Howells 提交于
flush_icache_range() is given virtual addresses to describe the region. It deals with these by attempting to translate them through the current set of page tables. This is fine for userspace memory and vmalloc()'d areas as they are governed by page tables. However, since the regions above 0x80000000 aren't translated through the page tables by the MMU, the kernel doesn't bother to set up page tables for them (see paging_init()). This means flush_icache_range() as it stands cannot be used to flush regions of the VM area between 0x80000000 and 0x9fffffff where the kernel resides if the data cache is operating in WriteBack mode. To fix this, make flush_icache_range() first check for addresses in the upper half of VM space and deal with them appropriately, before dealing with any range in the page table mapped area. Ordinarily, this is not a problem, but it has the capacity to make kprobes and kgdb malfunction. It should not affect gdbstub, signal frame setup or module loading as gdb has its own flush functions, and the others take place in the page table mapped area only. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 29 9月, 2010 1 次提交
-
-
由 David Howells 提交于
When caching is disabled on the MN10300 arch, the sys_cacheflush() function is removed by conditional stuff in the makefiles, but is still referred to by the syscall table. Provide a null version that just returns 0 when caching is disabled (or -EINVAL if the arguments are silly). Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 28 9月, 2010 1 次提交
-
-
由 David Howells 提交于
The configuration choice for the port on which the GDB stub listens has a default of GDBSTUB_TTYSM0, but this should be GDBSTUB_ON_TTYSM0 to match the option. Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-