- 27 1月, 2010 2 次提交
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由 Abhijit Pagare 提交于
Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4. Hence we need different macros for identifying platform specific offsets. Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Abhijit Pagare 提交于
Some of the OMAP4 specific chip level initialisations are taken care of. Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated to apply after the intervening cpu.h/id.c patch; thanks also to Tony for catching a bug in my rewrite] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 21 1月, 2010 16 次提交
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由 Sergio Aguirre 提交于
Fix following warning when CONFIG_DEBUG_FS wasn't selected: arch/arm/mach-omap2/pm-debug.c:57: warning: 'pm_dbg_init' declared 'static' but never defined Signed-off-by: NSergio Aguirre <saaguirre@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Subramani Venkatesh 提交于
Currently, DSS does not wakeup when there is a DMA request. DSS wake up event must be enabled so that the DMA request to refill the FIFO will wake up the CORE domain. Signed-off-by: NSubramani Venkatesh <subramani.venkatesh@windriver.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register (ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous OCP access to the SCM register area. Fixed by writing the last register to the save area. Also, optimized the delay loop for the HW save to include an udelay(1), which limits the number of unnecessary HW accesses to SCM register area during the save. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Acked-by: NNishanth Menon <nm@ti.com> Reviewed-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Roel Kluin 提交于
val is an u64 pointer, we need an int to check the error. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Peter Ujfalusi 提交于
Wake-up from McBSP ports are needed, especially when the THRESHOLD dma mode is in use for audio playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Manjunatha GK 提交于
The PM debug code fails to build on when CONFIG_DEBUG_FS is not enabled. Build error log: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/built-in.o: In function `configure_vc': arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init' arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init' make: *** [.tmp_vmlinux1] Error 1 This patch fixes the above errors. Kernel booting is tested on omap zoom2 and zoom3 boards. Signed-off-by: NManjunatha GK <manjugk@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sripathy, Vishwanath 提交于
As part of Core domain context restoration while coming out of off mode there are some registers being restored which are not required to be restored. ROM code will have restored them already. Overwriting some of them can have potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked. Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled. Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Acked-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
Previously used u32 as temporary data storage that wraps around at 4.294s. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sanjeev Premi 提交于
This patch removes code blocks that are repeated in function prcm_setup_regs(). Signed-off-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
OMAP interrupt controller goes to unknown state when there is right combination of l3,l4 sleep/wake-up transitions, l4 autoidle in interrupt controller and some interrupt. When this happens, interrupts are not delivered to ARM anymore and ARM will remain in WFI (wait for interrupt) until interrupt controller is forced to wake-up (i.e. lauterbach). Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
Enable the auto-idle feature of the SCM block to save some additional power. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
Suspending drivers may still generate interrupts just before their suspend is completed. Any pending interrupts here will prevent sleep. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Olof Johansson 提交于
Don't assume that gpmc_l3_clk is on, enable it before touching configuration registers. Note that the current code assumes that this clock is always enabled. We are already setting smart idle and L3 autogating for GPMC clock in gpmc_init. Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Rajendra Nayak 提交于
For all DPLL's the valid dividers are same as the values to be programmed in the register. 0 is an invalid value. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
The CHIRONSS has its own local PRCM module and the register defines need to use the CHIRONSS base and not the PRM base. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 20 1月, 2010 5 次提交
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由 Tony Lindgren 提交于
We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Make the omap_mux_read and write available for board code, and rename omap_mux_set_board_signals into omap_mux_write_array. Also add the related prototypes and comments into mux.h. In some cases we want to change the signals dynamically, mostly for power management. Note that we cannot use the signal names as they are set __init to save memory. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like cmdline muxing got broken at some point when we decided to limit muxing to __init code. Currently omap_mux_entry list is not yet initialized when we try to initialize cmdline muxing. Fix this by calling omap_mux_init_list() before calling omap_mux_set_cmdline_signals(). Reported-by: NPhilip Balister <philip@balister.org> Tested-by: NPhilip Balister <philip@balister.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Russell King 提交于
The first thing that omap2_init_clksel_parent() does is check for a non-zero .clksel field in the struct clk. Therefore, it is pointless calling this function on clocks where the clksel field is unset. Remove init calls to omap2_init_clksel_parent() on clocks without a clksel field. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Thara Gopinath 提交于
In the current implementation the sysconfig value is read into _sysc_cache once and an actual update to the sysconfig register happens only if the new value paased is differnt from the one in _sysc_cache. _sysc_cache is updated only if _HWMOD_SYSCONFIG_LOADED is not set. This can lead to the follwing issue if off mode is enabled in modules which employs "always-retore" mechanism of context save and restore. a. The module sets the sysconfig register through omap_device_enable. Here _sysc_cache is updated with the value written to the sysconfig register and left. b. The power domain containig the module enters off mode and the module context is lost. c. The module in use becomes active and calls omap_device_enable to enable itself. Here a read of sysconfig register does not happen as _HWMOD_SYSCONFIG_LOADED flag is set. The value to be written to the sysconfig register will be same as the one written in step a. Since _sysc_cache reflects the previous written value an update of the sysconfig register does not happen. This means in modules which employs "always-restore" mechanism after off , the sysconfig regsiters will never get updated. This patch introduces a flag SYSC_NO_CACHE which if set ensures that the sysconfig register is always read into _sysc_cache before an update is attempted. This flags need to be set only by modules which does not do a context save but re-initializes the registers every time the module is accessed. This includes modules like i2c, smartreflex etc. Signed-off-by: NThara Gopinath <thara@ti.com> [paul@pwsan.com: tweaked to apply on a different head, added flag comment] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 1月, 2010 14 次提交
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由 Paul Walmsley 提交于
Dynamically allocate the CPUFreq frequency table on OMAP2xxx chips. This fixes some compilation problems, since the kernel may not know what chip it is running on until boot-time. This also reduces the size of the CPUFreq frequency table. Problem originally reported by Felipe Balbi <felipe.balbi@nokia.com>. Thanks also for comments on the patch from Felipe and Kevin. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
Revise some of the comments in the OMAP2xxx OPP data for clarity. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com>
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由 Felipe Balbi 提交于
if we enable CPUFREQ we can't build omap2 for two reasons, one of them is fixed by the patch below. It's failing because the __must_be_array() check in ARRAY_SIZE() is failing and printing the following message: arch/arm/mach-omap2/clock2xxx.c:453: error: negative width in bit-field '<anonymous>' Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> [paul@pwsan.com: commit message updated; changed rate variable name] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tuukka Toivonen 提交于
Add necessary definitions to clock framework to allow changing dpll4_m5_ck rate. This is used by the camera code. Signed-off-by: NJouni Högander <jouni.hogander@nokia.com> Signed-off-by: NTuukka Toivonen <tuukka.o.toivonen@nokia.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
The correct parent of the McBSP 2, 3, and 4 functional clocks is PER_96M_FCLK, not CORE_96M_FCLK. Fix this in the OMAP clock tree. Reported by Nicole Chalhoub <n-chalhoub@ti.com>. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Nicole Chalhoub <n-chalhoub@ti.com>
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由 Kevin Hilman 提交于
UART1 & 2 were missing clockdomains resulting in broken omap_hwmod init for these devices. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430, we only map the IVA on OMAP2420. The memory mapping is not shared between OMAP2420 and OMAP2430, so it is inappropriate to label those macros as '24XX'; this patch changes them to '2420'. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Abhijit Pagare 提交于
In OMAP2/3 some of the clock-domains which did not have control facility were being falsely written to and read using the CM_CLKSTCTRL register though it did not exist for them. One check is added to remove this flaw. Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Huang Weiyi 提交于
Remove duplicated #include('s) in arch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/io.c Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
Without this the kernel doesn't boot, it craches in omap_mux_package_fixup(), since the package_subset becomes NULL. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Otherwise bringing up new boards can be harder: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0004000 [00000000] *pgd=00000000 Internal error: Oops: 5 [#1] last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.33-rc2-00015-g0bc9c93-dirty #37) PC is at omap_mux_init+0xa4/0x3d8 LR is at omap_mux_init+0x3c/0x3d8 ... Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roel Kluin 提交于
`!' has a higher precedence than `&' so parentheses are required. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Vimal Singh 提交于
Keys: 'right arrow', 'up arrow' and 'select' were mapped wrongly. This patch corrects them. This patch also adds one missing key present in the board, currently I added it as 'unknown' key, as I am not able to find proper description for this key. One key entry (r: 7, c: 5) is present in the keymap, which is really not present in the board, removing it. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Alexander Shishkin 提交于
Commit f62349ee makes it possible to have some other than first uart port as ttyS0, which breaks the workaround serial_in_override() function which will try to address the first uart port (for ttyS0) and not the one that was initialized. Signed-off-by: NAlexander Shishkin <virtuoso@slind.org> CC: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 12月, 2009 2 次提交
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由 Mika Westerberg 提交于
Commit f62349ee had side effect that causes kernel to oops when we are suspending to ram: # echo mem > /sys/power/state WARNING: at kernel/irq/manage.c:858 __free_irq+0x90/0x174() Trying to free already-free IRQ 72 Modules linked in: Backtrace: [<c00328d0>] (dump_backtrace+0x0/0x110) from [<c0347298>] (dump_stack+0x18/0x1c) r7:dfd4be08 r6:c009505c r5:c03fbfd1 r4:0000035a [<c0347280>] (dump_stack+0x0/0x1c) from [<c005a408>] (warn_slowpath_common+0x50/0x68) [<c005a3b8>] (warn_slowpath_common+0x0/0x68) from [<c005a46c>] (warn_slowpath_fmt+0x30) r7:c0474afc r6:00000048 r5:00000000 r4:c0474ac0 [<c005a43c>] (warn_slowpath_fmt+0x0/0x38) from [<c009505c>] (__free_irq+0x90/0x174) r3:00000048 r2:c03fc0ef [<c0094fcc>] (__free_irq+0x0/0x174) from [<c0095184>] (free_irq+0x44/0x64) [<c0095140>] (free_irq+0x0/0x64) from [<c0038100>] (omap_uart_enable_irqs+0x4c/0x90) r7:c034d58c r6:00000003 r5:00000000 r4:c0463028 [<c00380b4>] (omap_uart_enable_irqs+0x0/0x90) from [<c003d8f8>] (omap3_pm_begin+0x1c/0) r5:00000003 r4:00000000 [<c003d8dc>] (omap3_pm_begin+0x0/0x28) from [<c008d008>] (suspend_devices_and_enter+0x) [<c008cfd8>] (suspend_devices_and_enter+0x0/0x1dc) from [<c008d29c>] (enter_state+0xe8) r5:c03f7f46 r4:00000000 [<c008d1b4>] (enter_state+0x0/0x140) from [<c008c8e0>] (state_store+0x9c/0xc4) r7:c034d58c r6:00000003 r5:00000003 r4:c03f7f46 [<c008c844>] (state_store+0x0/0xc4) from [<c01cb2dc>] (kobj_attr_store+0x20/0x24) [<c01cb2bc>] (kobj_attr_store+0x0/0x24) from [<c0119420>] (sysfs_write_file+0x114/0x14) [<c011930c>] (sysfs_write_file+0x0/0x148) from [<c00cb298>] (vfs_write+0xb8/0x164) [<c00cb1e0>] (vfs_write+0x0/0x164) from [<c00cb408>] (sys_write+0x44/0x70) r8:4001f000 r7:00000004 r6:df81bd00 r5:00000000 r4:00000000 [<c00cb3c4>] (sys_write+0x0/0x70) from [<c002f040>] (ret_fast_syscall+0x0/0x38) r8:c002f204 r7:00000004 r6:401fa5e8 r5:4001f000 r4:00000004 This is due the fact that uart_list list was populated in omap_serial_early_init() and omap_uart_enable_irqs() went through this list even when serial idle wasn't enabled for all uarts. This patch moves the code that populates the uart_list and enables uart clocks into omap_serial_init_port(). Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Balaji T K 提交于
Recent drivers/mfd/twl4030* renames to twl broke compile for various boards as the series was missing a patch to change the board-*.c files. This patch renames include twl4030.h to include twl.h and also renames twl4030_i2c_ routines. Signed-off-by: NBalaji T K <balajitk@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: NFelipe Balbi <felipe.balbi@nokia.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 12月, 2009 1 次提交
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由 Olof Johansson 提交于
OMAP34XX has EHCI, so select USB_ARCH_HAS_EHCI. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NAnand Gadiyar <gadiyar@ti.com> Acked-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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