This patch factors out the reading of GPIOs for the Arizona devices
into a helper function.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

On the wm5102 the register patches are applied manually, rather than by
the regmap core. This application is wrapped in calls to
regcache_cache_bypass. However, this is dangerous as other threads may
be accessing the hardware at the same time as the pm_runtime operations
and if they do so during the period whilst cache_bypass is enabled those
writes will miss the cache when they shouldn't.

Apply the register patch using the new regmap_multi_reg_write_bypassed
function to avoid this problem. Also remove the call to
regcache_cache_bypass from the hardware patch application as it is
unneeded there and creates a similar window for writes to miss the
cache.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

As of commit 03e361b2 ("mfd: Stop setting
refcounting pointers in original mfd_cell arrays"), the "cell" parameter of
mfd_add_devices() is "const" again. Hence make all cell data passed to
mfd_add_devices() const where possible.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

When setting GPIO defaults we are required to make a distinction
between writing 0x0000 to the registers and leaving them untouched.

When we receive between 0x0000 and 0xFFFF (inclusive) from either
Platform Data or Device Tree, we should write the provided
configuration to the device. Conversely, when we receive >0xFFFF we
should leave the device configuration at its default setting.

This patch fixes a bug and ensures that configuration 0x0000 isn't
mistakenly written when the intention was to keep the default one.
Reported-by: NHeather Lomond <heather.lomond@wolfsonmicro.com>
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

If platform data is passed when probing the device then it should take
precedence over Device Tree. This patch saves cycles in the pdata case
and prevents error messages when DT is not passed.
Reported-by: NMark Brown <broonie@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The CODEC power supplies should be looked up on the Arizona device as
they will be created here by device tree also update the only user of
non-device tree bindings.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

If we disable DCVDD before we mark the cache as cache only, we might
attempt to write to the chip whilst it is powered down and lose a write.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The wm8997 is a compact, high-performance audio hub CODEC with SLIMbus
interfacing, for smartphones, tablets and other portable audio devices
based on the Arizona platform.

This patch integrates the wm8997 into the Arizona mfd.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The bit in the register enables MICBIAS fast startup when clear not when
set. This patch changes the name of this pdata option to soft_start to
better match the functionality. We rename rather than invert the
handling to keep the same default functionality, which is fast start
active.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

When the device is used with an external DCVDD supply instead of the
internal LDO1 then an extra step is required when suspending and resuming
the device.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

We aren't able to handle interrupts after the device has suspended since
we need to runtime resume it in order to do so but the controller may not
be available any more. Handle this in the same way as we handle a similar
issue on resume.
Reported-by: NChuansheng Liu <chuansheng.liu@intel.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

We'd forgotten to disable /RESET or the regulators. Practically speaking
this code is unlikely to ever be run.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Future updates will require us to manually apply the register patch for
wm5102.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Future devices may not fully report the device identification information
until their boot sequence is complete so defer acting on these until that
has finished.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

As we are using a custom boot sequence we don't need to wait for the
standard boot sequence in device init when the normal write sequence is
disabled.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Acquire the /RESET GPIO before we enable regulators and hold the device
in reset while the regulators power up in order to improve robustness
during the initial power up.

Also fix the error path so that the device is left in reset while we're
at it.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This patch deactivates the standard, currently noop, boot sequence
because we now have facilities in place for running a custom boot
sequence.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This patch adds facilities for apply a register patch contained within
the chip using the write sequencer.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Factor out the polling of the interrupt status register whilst we wait
for boot done to allow the polling to be reused in other situations.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Future updates will require us to manually apply the register patch for
wm5102.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Only the lowest three bits contain device revision for WM5102, the high
bits have been repurposed.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

If we have a directly provided 32kHz clock unconditionally enable it,
substantial chip functionality relies on it so dynamic management is
not worthwhile.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

MCLK1 is not in the AoD power domain so if it is used as the 32kHz clock
source we need to hold a runtime PM reference to keep the device from going
into low power mode.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Make sure that we don't leave the device enabled needlessly.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Allow the MICBIAS voltages and other attributes to be configured by the
platform.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

If the mixer is underclocked it will drop a sample so log that error
more directly.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Runtime power management does not function during system suspend but the
Arizona devices need to use runtime power management to power up the device
in order to handle interrupts. Try to avoid interrupts firing during
resume by disabling the primary IRQ before interrupts are reenabled on
resume and only reenabling it again during main resume.

The goal is to avoid issues in the situation where an interrupt is asserted
during resume (eg, due to it being the wake source) and the interrupt
handling gets scheduled prior to the device being able to handle runtime
PM.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Not strictly required as probe deferral will take care of everything but
it makes boot a little smoother.
Reported-by: NRyo Tsutsui <Ryo.Tsutsui@wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

If the control bus is unrelabile we may hit errors during regcache_sync(),
especially given that it tends to be one the most dense bursts of I/O in
many systems.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Make sure that we don't race with the initial device boot by only doing
the initialisation after we've waited for the boot to complete.

The runtime PM code already waits for the boot to complete before it
syncs the register patches so in most systems if a race does occur we will
power down very soon afterwards and recover anyway.
Reported-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Both WM5102 and WM5110 support haptics, register the device.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Both WM5102 and WM5110 support haptics, register the device.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

In the absence of a physical reset line the chip is reset by writing the
first register, which is done after the register patch has been applied.
This patch synchronises the register cache after the reset to preserve
any register changes that had been applied.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

In the interrupt handler for an underclocked event, whilst checking for
the source of the interrupt, AIF3 was checked twice and AIF1 was not
checked. This change correctly checks the AIF1 underclocked bit and
reports the correct error messages for all cases.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

wm5102_devs array was used for ARRAY_SIZE whilst adding the wm5110
devices. This change corrects this to get the size from the wm5110_devs
array. As both arrays are the same size no issues should have been
caused by this bug.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>