- 16 7月, 2015 5 次提交
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由 Andy Shevchenko 提交于
Intel Tangier has an IOSF Mailbox with PCI ID 8086:1170. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E . Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1436366709-17683-6-git-send-email-andriy.shevchenko@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Andy Shevchenko 提交于
- Move the static variables to one place - Fix indentations in the header - Correct comments No functional change. [ tglx: Massaged changelog ] Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E . Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1436366709-17683-5-git-send-email-andriy.shevchenko@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Andy Shevchenko 提交于
pci_dev_put() has already a check for NULL pointer. [ tglx: Massaged changelog ] Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E . Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1436366709-17683-4-git-send-email-andriy.shevchenko@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Andy Shevchenko 提交于
The code checks the result of the first debugfs_create call several times and fails to check the result of the subsequent calls due to missing assigments. Add the missing assignments and check only for !res because debugfs_create() returns only NULL on error and not an encoded error code. [ tglx: Massaged changelog ] Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E . Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1436366709-17683-3-git-send-email-andriy.shevchenko@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Andy Shevchenko 提交于
Move the driver to arch/x86/platform/intel since it is not a core kernel code and it is related to many Intel SoCs from different groups: Atom, MID, etc. There is no functional change. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E . Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1436366709-17683-2-git-send-email-andriy.shevchenko@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 19 9月, 2014 2 次提交
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由 David E. Box 提交于
Makes the IOSF sideband available through debugfs. Allows developers to experiment with using the sideband to provide debug and analytical tools for units on the SoC. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1411017231-20807-4-git-send-email-david.e.box@linux.intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 David E. Box 提交于
Add Braswell PCI ID to list of supported ID's for the IOSF driver. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1411017231-20807-2-git-send-email-david.e.box@linux.intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 28 8月, 2014 1 次提交
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由 David E. Box 提交于
Allows access to the iosf sideband through debugfs. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1409175640-32426-3-git-send-email-david.e.box@linux.intel.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 13 8月, 2014 1 次提交
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由 Benoit Taine 提交于
We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> [bhelgaas: add semantic patch] Signed-off-by: NBenoit Taine <benoit.taine@lip6.fr> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 10 5月, 2014 3 次提交
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由 Ong Boon Leong 提交于
Introduce PCI IDs macro for the list of supported product: BayTrail & Quark X1000. Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Link: http://lkml.kernel.org/r/1399668248-24199-5-git-send-email-david.e.box@linux.intel.comSigned-off-by: NDavid E. Box <david.e.box@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Ong Boon Leong 提交于
Add PCI device ID, i.e. that of the Host Bridge, for IOSF MBI driver. Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Link: http://lkml.kernel.org/r/1399668248-24199-4-git-send-email-david.e.box@linux.intel.comSigned-off-by: NDavid E. Box <david.e.box@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 David E. Box 提交于
Currently drivers that run on non-IOSF systems (Core/Xeon) can't use the IOSF driver on SOC's without selecting it which forces an unnecessary and limiting dependency. Provides dummy functions to allow these modules to conditionally use the driver on IOSF equipped platforms without impacting their ability to compile and load on non-IOSF platforms. Build default m to ensure availability on x86 SOC's. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1399668248-24199-2-git-send-email-david.e.box@linux.intel.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 09 1月, 2014 1 次提交
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由 David E. Box 提交于
Current Intel SOC cores use a MailBox Interface (MBI) to provide access to configuration registers on devices (called units) connected to the system fabric. This is a support driver that implements access to this interface on those platforms that can enumerate the device using PCI. Initial support is for BayTrail, for which port definitons are provided. This is a requirement for implementing platform specific features (e.g. RAPL driver requires this to perform platform specific power management using the registers in PUNIT). Dependant modules should select IOSF_MBI in their respective Kconfig configuraiton. Serialized access is handled by all exported routines with spinlocks. The API includes 3 functions for access to unit registers: int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) port: indicating the unit being accessed opcode: the read or write port specific opcode offset: the register offset within the port mdr: the register data to be read, written, or modified mask: bit locations in mdr to change Returns nonzero on error Note: GPU code handles access to the GFX unit. Therefore access to that unit with this driver is disallowed to avoid conflicts. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Link: http://lkml.kernel.org/r/1389216471-734-1-git-send-email-david.e.box@linux.intel.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Matthew Garrett <mjg59@srcf.ucam.org>
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