Correct two mishaps which prevented reporting error type (CECC vs UECC)
and extended error description.

Cc: <stable@kernel.org> # 32.x,  33.x
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Print the CPU associated with the error only when the field is valid.

Cc: <stable@kernel.org> # .32.x .33.x
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Although reporting of benign GART TLB errors is disabled in
__mcheck_cpu_apply_quirks, those are still being logged, and, as a
result, trip up amd64_edac. Pull up reporting check so that machines
with loaded edac module bail out early and don't spit fragments into
dmesg.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Fix core number reporting with NB MCEs.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

F10h revD start with model number 8.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Add an atomic notifier which ensures proper locking when conveying
MCE info to EDAC for decoding. The actual notifier call overrides a
default, negative priority notifier.

Note: make sure we register the default decoder only once since
mcheck_init() runs on each CPU.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20091003065752.GA8935@liondog.tnic>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

This converts the MCE decoding logic into a standalone config
option which can be built-in or a module, the first one being the
default for MCEs happening early on in the boot process.

This, beyond being separated in a cleaner way, also saves RAM by
making the decoding logic modular.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
LKML-Reference: <20091002133148.GD28682@aftab>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Make decoding of MCEs happen only on AMD hardware by registering a
non-default callback only on CPU families which support it.

While looking at the interaction of decode_mce() with the other MCE
code i also noticed a few other things and made the following
cleanups/fixes:

 - Fixed the mce_decode() weak alias - a weak alias is really not
   good here, it should be a proper callback. A weak alias will be
   overriden if a piece of code is built into the kernel - not
   good, obviously.

 - The patch initializes the callback on AMD family 10h and 11h.

 - Added the more correct fallback printk of:

	No support for human readable MCE decoding on this CPU type.
	Transcribe the message and run it through 'mcelog --ascii' to decode.

   On CPUs that dont have a decoder.

 - Made the surrounding code more readable.

Note that the callback allows us to have a default fallback -
without having to check the CPU versions during the printout
itself. When an EDAC module registers itself, it can install the
decode-print function.

(there's no unregister needed as this is core code.)

version -v2 by Borislav Petkov:

 - add K8 to the set of supported CPUs

 - always build in edac_mce_amd since we use an early_initcall now

 - fix checkpatch warnings
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
LKML-Reference: <20091001141432.GA11410@aftab>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Acked-by: NH. Peter Anvin <hpa@zytor.com>

See Fam10h BKDG (31116, rev. 3.28), Table 101.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

See Fam10h BKDG (31116, rev. 3.28), Table 100.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

... according to Table 69, Fam10h BKDG (31116, rev. 3.28).
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

See Fam10h BKDG (31116, rev. 3.28), Table 95
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Those get reported in MC0_STATUS, see Table 92, F10h BKDG (31116, rev.
3.28) for more details.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

This is the MCE error code from the MCi_STATUS banks, bits [15:0] which
describe what type of error was encountered: GART TLB, Memory or Bus
error. The semantics of those bits are identical across all MCE banks so
decode those separately, irrespectively of MCE type.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

The MCi_STATUS registers have most field definitions in common so decode
them in the general path. Do not pass ecc_type along and compute it in
__amd64_decode_bus_error instead.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Move NB decoder along with required defines to EDAC MCE core. Add
registration routines for further decoding of the MCE info in the AMD64
EDAC module.

CC: Andi Kleen <andi@firstfloor.org>
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

This is in preparation of adding AMD-specific MCE decoding functionality
to the EDAC core. The error decoding macros originate from the AMD64
EDAC driver albeit in a simplified and cleaned up version here.

While at it, add macros to generate the error description strings and
use them in the error type decoders directly which removes a bunch of
code and makes the decoding functions much more readable. Also, fix
strings and shorten macro names.

Remove superfluous htlink_msgs.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Borislav:
- cleanup comments
Reviewed-by: NMauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: NDoug Thompson <dougthompson@xmission.com>
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>