- 10 9月, 2014 2 次提交
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由 Rob Clark 提交于
Push a few bits down into adreno_gpu so they won't have to be duplicated as support for additional adreno generations is added. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Move this into into adreno_device, and decide based on gpu revision rather than just assuming a3xx. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 31 3月, 2014 2 次提交
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由 Rob Clark 提交于
Helper macro to simplify places where we need to poll with timeout waiting for gpu. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
msm.hang_debug=y will dump out current register values if the gpu locks up, for easier debugging. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 10 1月, 2014 2 次提交
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由 Rob Clark 提交于
Add support for adreno 330. Not too much different, just a few differences in initial configuration plus setting OCMEM base. Userspace support is already in upstream mesa. Note that the existing DT code is simply using the bindings from downstream android kernel, to simplify porting of this driver to existing devices. These do not constitute any committed/stable DT ABI. The addition of proper DT bindings will be a subsequent patch, at which point (as best as possible) I will try to support either upstream bindings or what is found in downstream android kernel, so that existing device DT files can be used. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
This got a bit broken with original patches when re-arranging things to move dependencies on mach-msm inside #ifndef OF. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 25 8月, 2013 2 次提交
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由 Rob Clark 提交于
A basic, no-frills recovery mechanism in case the gpu gets wedged. We could try to be a bit more fancy and restart the next submit after the one that got wedged, but for now keep it simple. This is enough to recover things if, for example, the gpu hangs mid way through a piglit run. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Add initial support for a3xx 3d core. So far, with hardware that I've seen to date, we can have: + zero, one, or two z180 2d cores + a3xx or a2xx 3d core, which share a common CP (the firmware for the CP seems to implement some different PM4 packet types but the basics of cmdstream submission are the same) Which means that the eventual complete "class" hierarchy, once support for all past and present hw is in place, becomes: + msm_gpu + adreno_gpu + a3xx_gpu + a2xx_gpu + z180_gpu This commit splits out the parts that will eventually be common between a2xx/a3xx into adreno_gpu, and the parts that are even common to z180 into msm_gpu. Note that there is no cmdstream validation required. All memory access from the GPU is via IOMMU/MMU. So as long as you don't map silly things to the GPU, there isn't much damage that the GPU can do. Signed-off-by: NRob Clark <robdclark@gmail.com>
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