Freescale eSDHC controller has the special order for
the HOST version register. that is not same as the other's
registers. The address of HOSTVER in spec is 0xFE, and
we need use the in_be16(0xFE) to access it, not in_be16(0xFC).
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Especially with Sandisk SDHC cards, the second SWITCH command was failing
with a timeout and the card was not recognized at all.  However if the
system was busy, or debugging was enabled, or a udelay(100) was inserted
before the second SWITCH command in the core code, then the timing was
so that the card started to work.

With some unusual block sizes, the data FIFO status doesn't indicate a
"empty" state right away when the data transfer is done.  Queuing
another data transfer in that condition results in a transfer timeout.

The empty FIFO bit eventually get set by itself in less than 50 usecs
when it is not set right away. So let's just poll for that bit before
configuring the controller with a new data transfer.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Empirical evidences show that this is causing far more problems than it
solves when this mode is enabled in the host hardware.  Amongst those
cards that are known to be non functional when this bit is set are:

	A-Data "Speedy" 2GB SD card
	Kodak 512MB SD card
	Ativa 1GB MicroSD card
	Marvell 8688 (WIFI/Bluetooth) SDIO card

Since those cards do work on other host controllers which do honnor the
hs timing, the issue must be with this particular host hardware.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

disable_irq() should wait for all running handlers to complete
before returning.  As such, if it's used to disable an interrupt
from that interrupt's handler it will deadlock.  This replaces
the dangerous instances with the _nosync() variant which doesn't
have this problem.
Signed-off-by: NBen Nizette <bn@niasdigital.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

We plan to use fsl,esdhc going forward as the base compatible so update
the driver to bind against it.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Signed-off-by: NNicolas Pitre <nico@marvell.com>
Tested-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Signed-off-by: NMartin Fuzzey <mfuzzey@gmail.com>

When a software timeout occurs in polling mode hardware was left in
an indeterminate state causing subsequent operations to block.
Signed-off-by: NMartin Fuzzey <mfuzzey@gmail.com>

Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

This is a temporary workaround until the MMC stack can be fixed.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

The second argument of the probe method points to the amba_id
structure, so it's better passed with the correct type. None of the
current in-tree drivers uses the pointer, so they have only been
checked for a clean compile.

Change suggested by Russell King.
Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix usage of obsolete parameters and functions in the driver's PM
callbacks.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Acked-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

If MMC debugging is enabled, the mmci driver oopses because the DBG
macro uses host->mmc before it is set.  Set it earlier.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

We forgot to add the ADMA error bit to the list of data interrupts.
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

The goto unmap is too early, we haven't allocated host or done the
request_region().

Found by smatch (http://repo.or.cz/w/smatch.git).

[ Second error path fix by Pierre Ossman ]
Signed-off-by: NDan Carpenter <error27@gmail.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Remove unused power_pin
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

A very large subset of SD cards in the market send their
responses and data non-byte-aligned. So add logic to the
mmc spi driver to handle this mess.
Signed-off-by: NWolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

With spurious interrupt cmd can be null even when we have CC
set in irq status.

Fixes: NB#106295 - prevent potential kernel crash in the MMC driver
Signed-off-by: NJarkko Lavinen <jarkko.lavinen@nokia.com>
Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

This fixes the issue noted by Russell King:

drivers/mmc/host/omap_hsmmc.c: In function 'mmc_omap_xfer_done':
drivers/mmc/host/omap_hsmmc.c:301: error: implicit declaration of function 'mmc_omap_fclk_lazy_disable'

This got broken by 4a694dc9.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

SD/MMC card timeouts can be very high. So avoid busy-waiting,
using the scheduler. Calculate all timeouts in jiffies units,
because this will give us the correct sign when to involve
the scheduler.
Signed-off-by: NWolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Spurious IRQs seen on MMC after 2.6.29.  Flush posted write in IRQ
handler.

The interrupt line is released by clearing the error status bits
in the MMCHS_STAT register, which must occur before the interrupt
handler returns to avoid unwanted irqs.  Hence the need to flush
the posted write.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
Acked-by: NTony Lindgen <tony@atomide.com>
Signed-off-by: NPierre Ossman <pierre@ossman.eu>

Signed-off-by: NPierre Ossman <pierre@ossman.eu>

DMA request source (RSSR) needs to be set only once (in probe).
DMA burst length (BLR) need to be set only in set_ios()

This cleans up imxmci_setup_data() and should make it a little
bit faster :)
Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Add __init __exit for appropriate probe and remove functions.
Conver to platform_driver_probe()
Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)

Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NMatt LaPlante <kernel1@cyberdogtech.com>
Acked-by: NRandy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Cc: drzeus-mmc@drzeus.cx
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NKay Sievers <kay.sievers@vrfy.org>

This fixes a bug when setting the sdc_reg for 4-bit bus width
transactions.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

This patch adds a new driver: sdhci-of. The driver is similar to
the sdhci-pci, it contains common probe code, and controller-specific
ops and quirks.

So far there are only Freescale eSDHC ops and quirks.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

FSL eSDHC controllers can support maximum block size up to 4096 bytes,
the MBL (Maximum Block Length) field in the capabilities register
extended by one bit, and is set to 0x3.

But the SDHCI core doesn't support blocks of 4096 bytes, and thus
forces blksz to the lowest value -- 512 bytes. With this patch we can
pin up the blksz to the maximum supported block size, i.e. 2048 bytes.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

FSL eSDHC controllers losing signal/interrupt enable states after
reset, so we should re-enable them.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Small udelay is needed to make eSDHC work in PIO mode. Without
the delay reading causes endless interrupt storm, and writing
corrupts data. The first guess would be that we must wait for
some bit in some register, but I didn't find any reliable bits
that change before and after the delay.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

FSL eSDHC hosts have incompatible register map to manage the SDCLK.
This patch adds set_clock callback so that drivers could overwrite
set_clock behaviour.

Similar patch[1] was posted by Ben Dooks, though in Ben's version the
callback is named change_clock, plus the patch has some unrelated bits
that makes the patch difficult to reuse.

[1] http://lkml.org/lkml/2008/12/2/160Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers do not provide clock information in their capabilities
(in the Samsung case, it is because there are multiple clock sources
available to the controller). Add hooks to allow the system to supply
clock information.

p.s.
In the original Ben's patch there was a bug that makes sdhci_add_host()
return -ENODEV even if callbacks were specified. This is fixed now.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

This patch adds SDHCI_QUIRK_INVERTED_WRITE_PROTECT quirk. When
specified, the sdhci driver will invert WP state.

p.s. Actually, the quirk is more board-specific than
     controller-specific.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

This patch adds SDHCI_QUIRK_BROKEN_CARD_DETECTION quirk. When specified,
sdhci driver will set MMC_CAP_NEEDS_POLL MMC host capability, and won't
enable card insert/remove interrupts.

This is needed for hosts with unreliable card detection, such as FSL
eSDHC. The original eSDHC driver was tring to "debounce" card-detection
IRQs by reading present state and disabling particular interrupts. But
with this debouncing scheme I noticed that sometimes we miss card
insertion/removal events.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some hosts (that is, FSL eSDHC) throw PIO interrupts during DMA
transfers, this causes tons of unneeded interrupts, and thus highly
degraded speed.

This patch modifies the driver so that now we only enable relevant
(DMA or PIO) interrupts during transfers.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Card detection interrupts should be handled separately as they should
not be enabled before mmc_add_host() returns and should be disabled
before calling mmc_remove_host(). The same is for suspend and resume
routines.

sdhci_init() no longer enables card-detection irqs. Instead, two new
functions implemented: sdhci_enable_card_detection() and
sdhci_disable_card_detection().

New sdhci_reinit() call implemented to behave the same way as the old
sdhci_init().

Also, this patch implements and uses few new helpers to manage IRQs in
a more conveinient way, that is:

- sdhci_clear_set_irqs()
- sdhci_unmask_irqs()
- sdhci_mask_irqs()
- SDHCI_INT_ALL_MASK constant

sdhci_enable_sdio_irq() converted to these new helpers, plus the
helpers will be used by the subsequent patches.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Currently the SDHCI driver works with PCI accessors (write{l,b,w} and
read{l,b,w}).

With this patch drivers may change memory accessors, so that we can
support hosts with "weird" IO memory access requirments.

For example, in "FSL eSDHC" SDHCI hardware all registers are 32 bit
width, with big-endian addressing. That is, readb(0x2f) should turn
into readb(0x2c), and readw(0x2c) should be translated to
le16_to_cpu(readw(0x2e)).
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some cards are not able to send the data token in time, but
miss the time frame for some bits(!). So synchronize to the
start of the token.
Signed-off-by: NWolfgang Muees <wolfgang.mues@auerswald.de>
Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>