1. 27 2月, 2016 1 次提交
  2. 30 1月, 2016 1 次提交
  3. 24 11月, 2015 1 次提交
  4. 25 8月, 2015 1 次提交
  5. 29 7月, 2015 1 次提交
  6. 25 3月, 2015 1 次提交
  7. 31 1月, 2015 1 次提交
  8. 19 6月, 2014 1 次提交
    • T
      clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock · 7d5fc85d
      Tomi Valkeinen 提交于
      When setting the rate of a clock, by default the clock framework will
      change the parent of the clock to the most suitable one in
      __clk_mux_determine_rate() (most suitable by looking at the clock rate).
      
      This is a rather dangerous default, and causes problems on AM43x when
      using display and ethernet. There are multiple ways to select the clock
      muxes on AM43x, and some of those clock paths have the same source
      clocks for display and ethernet. When changing the clock rate for the
      display subsystem, the clock framework decides to change the display mux
      from the dedicated display PLL to a shared PLL which is used by the
      ethernet, and then changes the rate of the shared PLL, breaking the
      ethernet.
      
      As I don't think there ever is a case where we want the clock framework
      to automatically change the parent clock of a clock mux, this patch sets
      the CLK_SET_RATE_NO_REPARENT for all ti,mux-clocks.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Reviewed-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      7d5fc85d
  9. 18 1月, 2014 1 次提交