The core clock does not depend on corediv, so enabling corediv
based on the clock is not really correct.  Move the corediv
config option from the clock driver Kconfig to the mvebu Kconfig
so that it can be enabled by the MACH option instead.

This also enables corediv on Armada 375 and 38X, which was
previously missing.
Signed-off-by: NKevin Smith <kevin.smith@elecsyscorp.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

There is no corediv clock on Armada XP, so this is unnecessary.
Signed-off-by: NKevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: NMichael Turquette <mturquette@baylibre.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This commit adds a new clock driver for the Marvell Armada 39x family
of processors. This driver is fairly similar to the ones already used
on other Marvell EBU processors, with the following main differences:

 * Different set of ratios
 * Different set of core clocks
 * Configurable reference clock in frequency
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.

Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-5-git-send-email-thomas.petazzoni@free-electrons.com
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Add the clock support for the new SoCs Armada 380 and Armada 385:
core clocks and gating clocks.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Add the clock support for the new SoC Armada 375: core clocks and
gating clocks.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This commit introduces a new group of clocks present in Armada 370/XP
SoCs (called "Core Divider" clocks) and add a provider for them.
The only clock supported for now is the NAND clock (ndclk), but the
infrastructure to add the rest is already set.
Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Switch from function-centric to soc-centric clock drivers now makes
a bunch of files obsolete. This deletes all files and Kconfig options
that are not required anymore.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This is moving core clock and clock gating init for Armada XP to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This is moving core clock and clock gating init for Armada 370 to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This is moving core clock and clock gating init for Kirkwood to its
own file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This is moving core clock and clock gating init for Dove to its own
file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This driver allows to provide DT clocks for clock gates found on
Marvell Dove and Kirkwood SoCs. The clock gates are referenced by
the phandle index of the corresponding bit in the clock gating control
register to ease lookup in the datasheet.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Add Armada 370/XP specific CPU clocks
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>