This flag is a no-op now. Remove usage of the flag.
Tested-by: NLeo Yan <leo.yan@linaro.org>
Cc: Bintian Wang <bintian.wang@huawei.com>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

There are cleary typo errors so can be removed.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Acked-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

The previous code, kernel builds Hi6220's common clock driver and stub
clock driver together. Stub clock driver has introduced the dependency
with CONFIG_MAILBOX, so kernel will not build Hi6220's common clock
driver due ARM64's defconfig have not enabled CONFIG_MAILBOX by default.

So separately build stub clock driver and common clock driver for
Hi6220; and only let stub clock driver has the dependency with
CONFIG_MAILBOX.
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

On Hi6220, there have some clocks which can use mailbox channel to send
messages to power controller to change frequency; this includes CPU, GPU
and DDR clocks.

For dynamic frequency scaling, firstly need write the frequency value to
SRAM region, and then send message to mailbox to trigger power controller
to handle this requirement. This driver will use syscon APIs to pass SRAM
memory region and use common mailbox APIs for channels accessing.

This init driver will support cpu frequency change firstly.
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

*of_iomap()* will check the device node pointer, and if the pointer is
NULL it will return error code. So refine clock's init flow by checking
the device node with this simple way; and polish a little for the print
out message.
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Some determine_rate implementations are not returning an error
when they failed to adapt the rate according to the rate request.
Fix them so that they return an error instead of silently
returning 0.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.

Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.

The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NTero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Tested-by: NRomain Perier <romain.perier@gmail.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also drop the clkdev.h include in files that
aren't using it.

Cc: Bintian Wang <bintian.wang@huawei.com>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Since commit 2893c379 ("clk: make strings in parent name arrays
const") the name of parent clocks can be const. So add more const in
several clock drivers.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Add clock drivers for hi6220 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.

We add one divider clock for hi6220 because the divider in hi6220
also has a mask bit but it doesnot obey the rule defined by flag
"CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by
left shift fixed bits (e.g. 16 bits), so we add this divider clock
to handle it.
Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: NBintian Wang <bintian.wang@huawei.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: NWill Deacon <will.deacon@arm.com>
Tested-by: NTyler Baker <tyler.baker@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NMichael Turquette <mturquette@linaro.org>

__init markings on function prototypes are useless, so remove
them.
Suggested-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NBintian Wang <bintian.wang@huawei.com>
Tested-by: NWill Deacon <will.deacon@arm.com>
Tested-by: NTyler Baker <tyler.baker@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NMichael Turquette <mturquette@linaro.org>

drivers/clk/hisilicon/clk-hix5hd2.c:255:13: warning: symbol 'hix5hd2_clk_register_complex' was not declared. Should it be static?
Acked-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

The statement

	static const char *name[];

defines a modifiable array of pointers to constant chars. That is

	*name[0] = 'f';

is forbidden, but

	name[0] = "f";

is not. So marking an array that is defined as above with __initconst is
wrong. Either an additional const must be added such that the whole
definition reads:

	static const char *const name[] __initconst;

or where this is not possible __initdata must be used.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMichael Turquette <mturquette@linaro.org>

Adds a way for clock consumers to set maximum and minimum rates. This
can be used for thermal drivers to set minimum rates, or by misc.
drivers to set maximum rates to assure a minimum performance level.

Changes the signature of the determine_rate callback by adding the
parameters min_rate and max_rate.
Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
[sboyd@codeaurora.org: set req_rate in __clk_init]
Signed-off-by: NMichael Turquette <mturquette@linaro.org>
[mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate
                        migrated clk-private.h changes to clk.c]

This is in preparation for clock providers to not have to deal with struct clk.
Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NMichael Turquette <mturquette@linaro.org>

Use __initconst instead of __initdata for constant init data.
Signed-off-by: NBintian Wang <bintian.wang@huawei.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: NMichael Turquette <mturquette@linaro.org>

hix5hd2 add I2C clocks (I2C0~i2C5)
Signed-off-by: NWei Yan <sledge.yanwei@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

hix5hd2 add watchdog0 clocks
Signed-off-by: NGuoxiong Yan <yanguoxiong@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Signed-off-by: NJiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Support clk of sata, usb and ethernet
Signed-off-by: NJiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Signed-off-by: NHaifeng Yan <haifeng.yan@linaro.org>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

Add hisi_clk_register_gate register clk gate table
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

Platform hix5hd2 use mux table, so use clk_register_mux_table instead
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

drivers/clk/hisilicon/clk-hi3620.c:338
mmc_clk_delay() warn: always true condition '(para >= 0) => (0-u32max >= 0)'
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Remove the static variable. So these common clock register helper could
be used in more SoCs.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

Now only fixed rate clocks are appended into the clock driver.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

The fixed rate and fixed factor clock isn't registered to clk table.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>

Suggest by Arnd: abstract mmc tuning as clock behavior,
also because different soc have different tuning method and registers.
hi3620_mmc_clks is added to handle mmc clock specifically on hi3620.
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add missing CLK_SET_RATE_PARENT flag for gate clock.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

The flags on dividers should be CLK_DIVIDER_HIWORD_MASK, not
CLK_MUX_HIWORD_MASK.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>