- 13 8月, 2015 11 次提交
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由 Thierry Reding 提交于
Upon driver load, reset the VBLANK machinery to off to reflect the hardware state. Since the ->reset() callback is called from the initial drm_mode_config_reset() call, move the latter after the VBLANK machinery initialization by drm_vblank_init(). Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Support low-active hotplug detect signals by storing the GPIO flags parsed from device tree. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use this macro to reduce some of the boilerplate. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Keep track of the number of users of DSI and CSI pads and power down the regulators that supply the bricks when all users are gone. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Some changes are needed to the configuration settings for some lanes. In addition, the clock lanes for the CSI pads can no longer be calibrated. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
While Tegra132 has the same pads as Tegra124, some configuration values need to be programmed slightly differently. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This table is never modified and can therefore reside in read-only memory. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Before starting a new calibration cycle, make sure to clear the current status by writing a 1 to the various "calibration done" bits. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use more consistent names for the clock lane configuration registers and fix the offset of the upper clock lane configuration register for the first DSI pad. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Parameterize more of the register programming to accomodate for changes required by future SoC generations. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 04 7月, 2015 1 次提交
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由 Shixin Zeng 提交于
The length of each EDID block is EDID_LENGTH, and number of blocks is (1 + edid->extensions) - we need to multiply not add them. This causes wrong EDID to be passed on, and is a regression introduced by d2ed3436 (drm: Introduce helper for replacing blob properties) Signed-off-by: NShixin Zeng <zeng.shixin@gmail.com> Cc: Daniel Stone <daniels@collabora.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: NDaniel Stone <daniels@collabora.com> [danvet: Add Cc: and fix commit summary.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 01 7月, 2015 1 次提交
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由 Pekka Enberg 提交于
Use kvfree() instead of open-coding it. Signed-off-by: NPekka Enberg <penberg@kernel.org> Cc: David Airlie <airlied@linux.ie> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 6月, 2015 7 次提交
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Similarly to what is done for SKL, clear the dpll_hw_state of the pipe config in hsw_dp_set_ddi_pll_sel(), since it main contain stale values. That can happen if a crtc that was previously driving an HDMI connector switches to a DP connector. In that case, the wrpll field was left with its old value, leading to warnings like the one below: [drm:check_crtc_state [i915]] *ERROR* mismatch in dpll_hw_state.wrpll (expected 0xb035061f, found 0x00000000) ------------[ cut here ]------------ WARNING: CPU: 1 PID: 767 at drivers/gpu/drm/i915/intel_display.c:12324 check_crtc_state+0x975/0x10b0 [i915]() pipe state doesn't match! This regression was indroduced in commit dd3cd74a Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Date: Fri May 15 13:34:29 2015 +0300 drm/i915: Don't overwrite (e)DP PLL selection on SKL Reported-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Tested-by: NJani Nikula <jani.nikula@intel.com> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Alex Deucher 提交于
Avoids a crash on pre-DP asics that support HDMI. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
v2: remove unrelated whitespace change, fix C comment Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
And use common fence infrastructure for the wait. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
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由 Alexander Kuleshov 提交于
If the CONFIG_DEBUG_FS is not selected, compilation of the drivers/gpu/drm/amd/amdgpu/amdgpu_device.c provides two warnings that amdgpu_debugfs_regs_init and amdgpu_debugfs_regs_cleanup are used but never defined. And as result: ERROR: "amdgpu_debugfs_regs_cleanup" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "amdgpu_debugfs_regs_init" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ^ Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlexander Kuleshov <kuleshovmail@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This reverts commit b9729b17. This seems to break the cursor on resume for lots of systems. Cc: stable@vger.kernel.org
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- 29 6月, 2015 20 次提交
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由 Sonny Jiang 提交于
Fixes a hang on resume. Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Sonny Jiang 提交于
Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Remove duplication across asic families and make it symmetric with the freeing of the code in amdgpu_device.c Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maninder Singh 提交于
kfree(NULL) is safe and this check is probably not required Signed-off-by: NManinder Singh <maninder1.s@samsung.com> Reviewed-by: NVaneet Narang <v.narang@samsung.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maninder Singh 提交于
Use kzalloc rather than kcalloc(1.. for allocating one thing. Signed-off-by: NManinder Singh <maninder1.s@samsung.com> Reviewed-by: NVaneet Narang <v.narang@samsung.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We only should do so when the BO_VA was actually mapped. Otherwise we get a nice error message on the next CS. v2: It actually doesn't matter if it was invalidated or not, if it was mapped we need to clear the area where it was mapped. Signed-off-by: NChristian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> (v1) Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Sonny Jiang 提交于
This patch is to resolve compute hang at resume time. v2: (agd5f) squash in second fix Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com>
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由 Christian König 提交于
Port of radeon commit 29c63fe2. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com>
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由 Christian König 提交于
port of radeon commit 2fc5703a. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com>
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由 monk.liu 提交于
Signed-off-by: Nmonk.liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Jérôme Glisse 提交于
In order for hibernation to reliably work we need to properly turn off the SDMA block, sadly after numerous attemps i haven't not found proper sequence for clean and full shutdown. So simply reset both SDMA block, this makes hibernation works reliably on sea island GPU family (CI) Hibernation and suspend to ram were tested (several times) on : Bonaire Hawaii Mullins Kaveri Kabini Cc: stable@vger.kernel.org Signed-off-by: NJérôme Glisse <jglisse@redhat.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jérôme Glisse 提交于
In order for hibernation to reliably work we need to cleanup more thoroughly the compute ring. Hibernation is different from suspend resume as when we resume from hibernation the hardware is first fully initialize by regular kernel then freeze callback happens (which correspond to a suspend inside the radeon kernel driver) and turn off each of the block. It turns out we were not cleanly shutting down the compute ring. This patch fix that. Hibernation and suspend to ram were tested (several times) on : Bonaire Hawaii Mullins Kaveri Kabini Changed since v1: - Factor the ring stop logic into a function taking ring as arg. Cc: stable@vger.kernel.org Signed-off-by: NJérôme Glisse <jglisse@redhat.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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