The registers are slightly different between v1 and v2 ip that
is available in omap4 and later for some timers.

Add support for v2 ip by mapping the interrupt related registers
separately and adding func_base for the functional registers.

Also disable dmtimer driver features on omap4 for now as
those need the hwmod conversion series to deal with enabling
the timers properly in omap_dm_timer_init.
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Tested-by: NHemant Pedanekar <hemantp@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Currently autoidle is only enabled for OMAP2/3; by enabling autoidle,
the automatic L4 clock gating strategy is applied based on L4 activity,
otherwise L4 clock to module will be a free running.
Signed-off-by: NAmbresh K <ambresh@ti.com>
[tony@atomide.com: updated for timer init changes]
Signed-off-by: NTony Lindgren <tony@atomide.com>

There's no need to initialize the dmtimer framework early.
Just mark the clocksource and timesource as reserved, and
initialize dmtimer with an arch_initcall.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>

This will allow us to share the code between system timer and
dmtimer device driver code without having to initialize all the
dmtimers early. This change will also make the timer_set_next_event
more efficient as the inline functions will optimize the code
better for the timer reprogramming.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>

These will be needed when dmtimer platform init code gets split
for omap1 and omap2+. These will also be needed for separate
sys_timer init and driver init for the rest of the hardware timers
in the following patches. No functional changes.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>

This saves some power. OMAP4 version should check for GPT module ID, as
autoidle is only supported on a subset of these.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch is temporary fix to below crash. This is observed when
CPU is clocked more than 600 MHz.

Unhandled fault: imprecise external abort (0x1406) at 0xbf9ef65c
Internal error: : 1406 [#1] PREEMPT SMP
last sysfs file:
Modules linked in:
CPU: 0    Not tainted  (2.6.36-rc3+ #18)
PC is at kernel_thread_helper+0x0/0x14
LR is at kernel_thread_helper+0x0/0x14
pc : [<c003ce14>]    lr : [<c003ce14>]    psr: 00000093
sp : dc83bff8  ip : 00000000  fp : 00000000
r10: 00000000  r9 : 00000000  r8 : 00000000
r7 : 00000013  r6 : c003ce28  r5 : c008935c  r4 : 00000000
r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 00000000
Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7f  Table: 8000404a  DAC: 00000017
Process swapper (pid: 2, stack limit = 0xdc83a2f0)
Stack: (0xdc83bff8 to 0xdc83c000)
bfe0: 00000000 ffffffff
[<c003ce14>] (kernel_thread_helper+0x0/0x14) from [<fffffffe>] (0xfffffffe)
Code: c03a0ba3 c03a5fcb c045c880 c0394035 (eb017701)
---[ end trace 1b75b31a2719ed1c ]---

The timer hwmod adaptation will eventually fix it in a proper way.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

The kernel timer queue is being run currently from a GP timer running in a one
shot mode, which works in a way that when it expires, it will also stop.
Usually during this situation, the interrupt handler will ack the interrupt,
load a new value to the timer and start it again. During suspend, the
situation is slightly different, as we disable interrupts just before
timekeeping is suspended, which leaves a small window where the timer can
expire before it is stopped, and will leave the interrupt flag pending.
This pending interrupt will prevent ARM sleep entry, thus now we ack it always
when we are attempting to stop a timer.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
[tony@atomide.com: removed the ifdef to make the patch cover omap1 also]
Signed-off-by: NTony Lindgren <tony@atomide.com>

The clock sources for timers on OMAP4 (system clock and 32k
clock) have their names wronly populated.
This patch fixes them so the omap_dm_timer_set_source
does not fail anymore.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch removes all the omap4 specific irq line
defines from plat/irqs.h and includes auto-generated
irqs-44xx.h
All the legacy naming style defines are replaced with the one
from irqs-44xx.h
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated to compile with usb-musb.c]
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix dmtimer.c for multi-omap boot. Also remove legacy
clk_enable/disable wrappers that are no longer needed.

Note that the clock handling should be further improved
to make use of the clock aliases.
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP GP timers keep running for a few cycles after they are stopped,
which can cause the timer to expire and generate an interrupt. The
pending interrupt will prevent e.g. OMAP from entering suspend, thus
we ack it manually.  Only applicable on OMAP2/3/4.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.

This was done with:

#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"

for header in $headers; do
	old="#include <mach\/$header"
	new="#include <plat\/$header"
	for dir in $omap_dirs; do
		find $dir -type f -name \*.[chS] | \
			xargs sed -i "s/$old/$new/"
	done
	find drivers/ -type f -name \*omap*.[chS] | \
		xargs sed -i "s/$old/$new/"
	for file in $other_files; do
		sed -i "s/$old/$new/" $file
	done
done

for header in $(ls $mach_dir_old/*.h); do
	git mv $header $plat_dir_new/
done
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use ioremap in dmtimer.c
Signed-off-by: NTony Lindgren <tony@atomide.com>

Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS,
and convert omap_read/write into a functions instead of a macros.

Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE.

In the long run, most code should use ioremap + __raw_read/write instead.
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds the support for OMAP4. The platform and machine specific
headers and sources updated for OMAP4430 SDP platform.

OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch fixes the compiler warning "assignment from incompatible
pointer type"  in dmtimer.c and removes the tye casts. These warnings
were suppressed by type catsing.

The proposed fix was suggested by Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch fixes the compiler warning "assignment from incompatible
pointer type"  in dmtimer.c and removes the tye casts. These warnings
were suppressed by type catsing.

The proposed fix was suggested by Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12.  Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management.  GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management.  GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator.  But on HS devices, it
may not be available for Linux use.

It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below.  Modify board-omap3beagle.c to use GPTIMER12.

This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.

Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.

Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>

All GP timers on OMAP2/3 can generate wakeup events.  The wakeup status is
cleared in the PRCM interrupt handler.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2.  (ref: OMAP34xx
Multimedia High Security (HS) Device Silicon Revision 3.0 Security
Addendum Rev. B, SWPU119B)
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Make the dmtimer function symbols available so modules can take use of
them.
Signed-off-by: NTimo Kokkonen <timo.t.kokkonen@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The GPTIMER TLDR register does not need to be written if the GPTIMER
is not in autoreload mode.  This is the usual case for dynamic tick-enabled
kernels.

Simulation data indicate that skipping the read that occurs as part of
the write should save at least 300-320 ns for each GPTIMER1 timer
reprogram.  (This assumes L4-Wakeup is at 19MHz and GPTIMER write
posting is enabled.)  Skipping the write itself probably won't have
much impact since it should be posted on the OCP interconnect.

Tested on 2430SDP and 3430SDP.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap_dm_timer_write_reg() already waits for pending writes to complete,
so the extra wait in omap_dm_timer_set_load() is superfluous.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies
for use with __raw_{read|write}* for accessing registers.  Therefore,
these macros should return (void __iomem *) cookies, not integer values.

Doing this improves typechecking, and means we can find those places
where, eg, DMA controllers are incorrectly given virtual addresses to
DMA to, or physical addresses are thrown through a virtual to physical
address translation.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch optimizes the timer load and start sequence.  By combining the
load and start a needless posted wait can be removed from the system timer
execution path.

* Before patch register writes are taking up .078% @ 500MHz during idle.

 Address                 |total  |min  |max      |avr     |count|ratio%
 old\process\default_idle|7.369s |0.0us|999.902ms|14.477ms|509. |62.661%
 ld\Global\cpu_v7_do_idle|4.265s |0.0us|375.786ms|24.374ms|175. |36.270%
                (UNKNOWN)|17.503ms|0.us|531.080us|5.119us|3419. |0.148%
 r\omap_dm_timer_set_load|8.135ms|0.0us|79.887us|15.065us|540.  |0.069% <--
 \vmlinux-old\Global\_end|2.023ms|0.0us|4.000us|0.560us|3613.   |0.017%
 -old\Global\__raw_readsw|1.962ms|0.0us|108.610us|9.167us|214.  |0.016%
 old\smc91x\smc_interrupt|1.353ms|0.0us|10.212us|2.348us|576.   |0.011%
 s/namei\__link_path_walk|1.161ms|0.0us|4.310us|0.762us|  1524. |0.009%
 \omap_dm_timer_write_reg|1.085ms|0.0us|126.150us|2.153us|504.  |0.009% <--

* After patch timer functions do not show up in top listings for long captures.
Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds the use of write posting for the timer.  Previously, every
write could lock the requestor for almost 3x32KHz cycles.  This patch only
synchronizes before writes and reads instead of after them and it does
it on per register basis.  Doing it this way there is some chance to hide
some of the sync latency.  It also removes some needless reads when
non-posted mode is there.  With out this fix the read/writes take almost
2% CPU load @500MHz just waiting on tick timer registers.

Also define new 34xx only registers.
Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add DM timer support for OMAP3.

Fixed source clocks for 3430 by Paul Walmsley <paul@pwsan.com>.
Signed-off-by: NSyed Mohammed Khasim <x0khasim@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Cleanup DM timer list for OMAP2 and OMAP1 to allow
adding support for 3430.
Signed-off-by: NSyed Mohammed Khasim  <x0khasim@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove the OMAP1 version of omap_dm_timer_get_fclk(), and its associated
compile-time warning.  It would only BUG() if called, while it's only
called on OMAP2.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch syncs omap specific core code with linux-omap.
Most of the changes are needed to fix bitrot caused by
driver updates in linux-omap tree.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds minimal OMAP2430 support to plat-omap files to
get the kernel booting on 2430SDP.
Signed-off-by: NSyed Mohammed Khasim <x0khasim@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When I went to use dmtimer7 it did not seem to work.  I noticed that
the base addresses for dmtimers 7 and 8 were set wrong.  A simple patch
to correct a small error.  Confirmed to fix the problem on an OSK.
Signed-off-by: NMatthew Percival <matthew@capgo.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix warnings

arch/arm/plat-omap/dmtimer.c: In function
'omap_dm_timer_modify_idlect_mask':
arch/arm/plat-omap/dmtimer.c:317: warning: no return
statement in function returning non-void

arch/arm/plat-omap/mailbox.c: In function 'omap_mbox_init':
arch/arm/plat-omap/mailbox.c:231: warning: ignoring return
value of 'class_device_create_file', declared with attribute
warn_unused_result

Signed-off-by: Dirk Behme <dirk.behme_at_gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

GPT1 will be set into non-posted mode, and the wakeup register
is set for all timers.
Signed-off-by: NJuha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>