- 08 7月, 2016 12 次提交
-
-
由 Alex Deucher 提交于
The platform d3 cold is used to power down the dGPU. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
hybrid graphics in this case refers to systems which use the new platform d3 cold ACPI methods as opposed to ATPX for dGPU power control. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
Now that we handle this correctly, there is no need to force it. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
On PX systems without dGPU power control, use PCI_D3hot. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
The runtime pm sequence is different depending on whether or not the platform supports ATPX dGPU power control. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
ATPX dGPU power control requires a 200ms delay between power off and on. This should fix dGPU failures on resume from power off. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-
由 Alex Deucher 提交于
The presence of the power control method should be determined via the presence of the method in function 0. However, some sbioses only set the appropriate bits in function 1 so use then to override a missing power control function. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
Windows 10 (and some 8.1) systems use standardized ACPI calls for hybrid laptops to control dGPU power. Detect those cases and disable the AMD specific ATPX power control. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Edmondo Tommasina 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NEdmondo Tommasina <edmondo.tommasina@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
The size needs to handle the CP JT and GDS. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
The power tables on some variants require different firmware. This may fix stability issues on some newer CI parts. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91880Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Alex Deucher 提交于
The power tables on some variants require different firmware. This may fix stability issues on some newer SI parts. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 14 6月, 2016 5 次提交
-
-
由 Alex Deucher 提交于
When executing in a PCI passthrough based virtuzliation environment, the hypervisor will usually attempt to send a PCIe bus reset signal to the ASIC when the VM reboots. In this scenario, the card is not correctly initialized, but we still consider it to be posted. Therefore, in a passthrough based environemnt we should always post the card to guarantee it is in a good state for driver initialization. Ported from amdgpu commit: amdgpu: fix asic initialization for virtualized environments Cc: Andres Rodriguez <andres.rodriguez@amd.com> Cc: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-
由 Gustavo Padovan 提交于
We don't need to use &radeon_crtc->base there as crtc is available in the function. Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1465308482-15104-10-git-send-email-gustavo@padovan.org
-
由 Gustavo Padovan 提交于
Replace the legacy drm_vblank_{on,off}() with the new helper functions. Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1465308482-15104-8-git-send-email-gustavo@padovan.org
-
由 Christian König 提交于
Seems to cause problems for some older hardware. Kudos to Thom Kouwenhoven for working a lot with the PLLs and figuring this out. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Jérôme Glisse 提交于
Seems r600/r700 does not like hard reset while freezing for hibernation (regression due to 274ad65c which itself is a fix for hibernation on some GPU families). Until i can debug further issue with r600, let just disable this for r600/r700 as they are very similar family and bug affecting one likely affect the other. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NJérôme Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 07 6月, 2016 2 次提交
-
-
由 Maarten Lankhorst 提交于
Change return value to int to propagate errors from gamma_set, and remove start parameter. Updates always use the full size, and some drivers even ignore the start parameter altogether. This is needed for atomic drivers, where an atomic commit can fail with -EINTR or -ENOMEM and should be restarted. This is already and issue for drm_atomic_helper_legacy_set_gamma, which this patch fixes up. Changes since v1: - Fix compiler warning. (Emil) - Fix commit message (Daniel) Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Eric Anholt <eric@anholt.net> Cc: VMware Graphics <linux-graphics-maintainer@vmware.com> Cc: Mathieu Larouche <mathieu.larouche@matrox.com> Cc: Thierry Reding <treding@nvidia.com> Acked-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> [danvet: Improve commit message a bit more, mention that this fixes the helper.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/742944bc-9f41-1acb-df4f-0fd4c8a10168@linux.intel.com
-
由 Gustavo Padovan 提交于
Replace the legacy drm_vblank_{get,put}() with the new helper functions. Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1465224105-21485-13-git-send-email-gustavo@padovan.org
-
- 02 6月, 2016 1 次提交
-
-
由 Christian König 提交于
Fence contexts are created on the fly (for example) by the GPU scheduler used in the amdgpu driver as a result of an userspace request. Because of this userspace could in theory force a wrap around of the 32bit context number if it doesn't behave well. Avoid this by increasing the context number to 64bits. This way even when userspace manages to allocate a billion contexts per second it takes more than 500 years for the context number to wrap around. v2: fix printf formats as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: NSumit Semwal <sumit.semwal@linaro.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1464786612-5010-2-git-send-email-deathsimple@vodafone.de
-
- 31 5月, 2016 1 次提交
-
-
由 Lukas Wunner 提交于
So far we've got one condition when DRM drivers need to defer probing on a dual GPU system and it's coded separately into each of the relevant drivers. As suggested by Daniel Vetter, deduplicate that code in the drivers and move it to a new vga_switcheroo helper. This yields better encapsulation of concepts and lets us add further checks in a central place. (The existing check pertains to pre-retina MacBook Pros and an additional check is expected to be needed for retinas.) One might be tempted to check deferred probing conditions in vga_switcheroo_register_client(), but this is usually called fairly late during driver load. The GPU is fully brought up and ready for switching at that point. On boot the ->probe hook is potentially called dozens of times until it finally succeeds, and each time we'd repeat bringup and teardown of the GPU, lengthening boot time considerably and cluttering logfiles. A separate helper is therefore needed which can be called right at the beginning of the ->probe hook. Note that amdgpu currently does not call this helper as the AMD GPUs built into MacBook Pros are only supported by radeon so far. v2: This helper could eventually be used by audio clients as well, so rephrase kerneldoc to refer to "client" instead of "GPU" and move the single existing check in an if block specific to PCI_CLASS_DISPLAY_VGA devices. Move documentation on that check from kerneldoc to a comment. (Daniel Vetter) v3: Mandate in kerneldoc that registration of client shall only happen after calling this helper. (Daniel Vetter) v4: Rebase on 412c8f7d ("drm/radeon: Return -EPROBE_DEFER when amdkfd not loaded") v5: Some Optimus GPUs use PCI_CLASS_DISPLAY_3D, make sure those are matched as well. (Emil Velikov) v6: The if-condition referring to PCI_BASE_CLASS_DISPLAY may be considered a functional change. Move to a separate commit to keep this a pure refactoring change. (Emil Velikov, Jani Nikula) Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/575885fd440c2b13c3f19ddf44360cfbbff35f50.1464685538.git.lukas@wunner.de
-
- 24 5月, 2016 1 次提交
-
-
由 Michal Hocko 提交于
radeon_mn_get which is called during ioct path relies on mmap_sem for write. If the waiting task gets killed by the oom killer it would block oom_reaper from asynchronous address space reclaim and reduce the chances of timely OOM resolving. Wait for the lock in the killable mode and return with EINTR if the task got killed while waiting. Signed-off-by: NMichal Hocko <mhocko@suse.com> Acked-by: NVlastimil Babka <vbabka@suse.cz> Reviewed-by: NChristian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: David Airlie <airlied@linux.ie> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 21 5月, 2016 1 次提交
-
-
由 Daniel Vetter 提交于
This was added in commit 0a3e67a4 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Sep 30 12:14:26 2008 -0700 drm: Rework vblank-wait handling to allow interrupt reduction. to stay backwards-compatible with old UMS code that didn't even tell the kernel when it did a modeset, so that the kernel could save/restore vblank counters. At worst this means vblanks will be somewhat funky on a setup that very likely no one still runs. So let's just nuke it. Plan B would be to set it unconditionally in drm_vblank_init for kms drivers, instead of in each driver separately. So if this patch breaks anything please only restore the hunks in drmP.h and drm_irq.c, plus add a check for DRIVER_MODESET in drm_vblank_init. Stumbled over this in a discussion on irc with Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 19 5月, 2016 1 次提交
-
-
由 Arnd Bergmann 提交于
After drm_gem_object_lookup() was changed along with all its callers, we have several drivers that have unused variables: drm/armada/armada_crtc.c: In function 'armada_drm_crtc_cursor_set': drm/armada/armada_crtc.c:900:21: error: unused variable 'dev' [-Werror=unused-variable] drm/nouveau/nouveau_gem.c: In function 'validate_init': drm/nouveau/nouveau_gem.c:371:21: error: unused variable 'dev' [-Werror=unused-variable] drm/nouveau/nv50_display.c: In function 'nv50_crtc_cursor_set': drm/nouveau/nv50_display.c:1308:21: error: unused variable 'dev' [-Werror=unused-variable] drm/radeon/radeon_cs.c: In function 'radeon_cs_parser_relocs': drm/radeon/radeon_cs.c:77:21: error: unused variable 'ddev' [-Werror=unused-variable] This fixes all the instances I found with ARM randconfig builds so far. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Fixes: a8ad0bd8 ("drm: Remove unused drm_device from drm_gem_object_lookup()") Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1463587653-3035181-6-git-send-email-arnd@arndb.de
-
- 17 5月, 2016 1 次提交
-
-
由 Chris Wilson 提交于
drm_gem_object_lookup() has never required the drm_device for its file local translation of the user handle to the GEM object. Let's remove the unused parameter and save some space. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: dri-devel@lists.freedesktop.org Cc: Dave Airlie <airlied@redhat.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> [danvet: Fixup kerneldoc too.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
-
- 16 5月, 2016 1 次提交
-
-
由 tom will 提交于
When the initial value of i is greater than zero, it may cause endless loop, resulting in array out of bounds, fix it. Signed-off-by: Ntom will <os@iscas.ac.cn> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 13 5月, 2016 1 次提交
-
-
由 Alex Deucher 提交于
Switch the order of the loops to walk the rates on the top so we exhaust all DP 1.1 rate/lane combinations before trying DP 1.2 rate/lane combos. This avoids selecting rates that are supported by the monitor, but not the connector leading to valid modes getting rejected. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95206Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-
- 05 5月, 2016 11 次提交
-
-
由 Lucas Stach 提交于
On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should not be taken into consideration when looking for an already enabled PLL to be shared with other outputs. This fixes the broken VGA port (TRAVIS DP->VGA bridge) on my Richland based laptop, where the internal display is connected to UNIPHYA through a TRAVIS DP->LVDS bridge. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=78987 v2: agd: add check in radeon_get_shared_nondp_ppll as well, drop extra parameter. Signed-off-by: NLucas Stach <dev@lynxeye.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-
由 Arindam Nath 提交于
There is an issue observed when we hotplug a second DP 4K monitor to the system. Sometimes, the link training fails for the second monitor after HPD interrupt generation. The issue happens when some queued or deferred transactions are already present on the AUX channel when we initiate a new transcation to (say) get DPCD or during link training. We set AUX_IGNORE_HPD_DISCON bit in the AUX_CONTROL register so that we can ignore any such deferred transactions when a new AUX transaction is initiated. Signed-off-by: NArindam Nath <arindam.nath@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-
由 Dave Airlie 提交于
This adds support for SET_APPEND_CNT packet3 to the VM paths. Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Bas Nieuwenhuizen 提交于
Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches into COMPUTE_USER_DATA_*. Setting those registers with a SET_SH_REG packet is allowed, not allowing them with other packets seems like an oversight. v2: Clarify commit message. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
This allows fine grained control for the driver where to add a BO into the LRU. v2: fix typo in comment Reviewed-by: NSinclair Yeh <syeh@vmware.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
Not used any more. Reviewed-by: NSinclair Yeh <syeh@vmware.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
Not used any more. Reviewed-by: NSinclair Yeh <syeh@vmware.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Dave Airlie 提交于
This adds support to the command parser for the set append counter packet3, this is required to support atomic counters on evergreen/cayman GPUs. v2: fixup some of the hardcoded numbers with real register names (Christian) Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Arindam Nath 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NArindam Nath <arindam.nath@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Arindam Nath 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NArindam Nath <arindam.nath@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Michel Dänzer 提交于
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Currently this is only supported on ASICs which have a page flip completion interrupt (>= R600), and only if the use_pflipirq parameter has value 2 (the default). Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 04 5月, 2016 2 次提交
-
-
由 Daniel Vetter 提交于
No dev->struct_mutex anywhere to be seen. Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1461691808-12414-24-git-send-email-daniel.vetter@ffwll.ch
-
由 Alex Deucher 提交于
hw doesn't like a 0 value. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-