Configure the FIFO THREASHOLD value different for read and write to keep busy
both filling and to drain out of FIFO at reading and writing.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch enable prefetch-irq mode for nand transfer(read, write)
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

nand transfer type (sDMA, Polled, prefetch) can be select from board file,
enabling all transfer type in driver, by default.

this helps in multi-omap build and to select different transfer type for
different board.
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

zoom3 and 3630-sdp having the x16 nand device.
This patch configure gpmc as x16 and select the currect function in driver
for polled mode (without prefetch enable) transfer.
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

"info->cmdset" gets dereferenced in __readid() so it needs to be
initialized earlier in the function.  This bug was introduced in
18c81b18 "mtd: pxa3xx_nand: remove the flash info in driver
structure".

Cc: stable@kernel.org [2.6.37+]
Reported-and-tested-by: NSven Neumann <s.neumann@raumfeld.com>
Signed-off-by: NDan Carpenter <error27@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Initialize mtd->writebufsize to be equal to mtd->writesize.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

See commit: c0cbfd0e
Using __nand_correct_data() helper function, this driver can read 512
byte (with 6 byte ECC) at a time.

This is correct, but not more:
With NAND chips providing page sizes > 512 Bytes
chip->ecc.bytes are calculated > 6 in txx9ndfmc_nand_scan.
According the data sheet there are (only) 6 bytes ECC available.

After applying the patch a Hynix 512M*8 with 2KiB page size could be
successfully formatted and used with an ubifs file system.
Signed-off-by: NRalf Roesch <ralf.roesch@rw-gmbh.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Acked-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

There is a common requirement for not using OMAP specific omap_readw() /
omap_writew() function calls in drivers/, but replace them with
readw() / writew() on ioremap()ped addresses passed from arch/ instead.

The patch implements this idea for the Amstrad Delta NAND driver. To be
able to use the modified driver, the board file is updated with the
platform device I/O resource declaration, which is passed from there.

Created and tested against linux-2.6.37-rc5, on top of recent patch
'MTD: NAND: ams-delta: convert to platform driver'.
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Now that the Amstrad Delta NAND driver is converted to a platform driver,
which prevents it from interfering with other unrelated hardware in multiple
OMAP1 cpu and machine configurations, it can be automatically configured for
being built into the kernel if the Amstrad Delta board is also selected.
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

In checking for the ONFI revision, the first conditional (for checking
"unsupported" ONFI) seems unnecessary.  All ONFI revisions should be
backwards-compatible; even if this is not the case on some newer ONFI
revision, it should simply fail the second version-checking if-else block
(i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we
move our "unsupported" condition after having checked each bit field.

Also, it's simple enough to add a condition for ONFI revision 2.3. Note
that this does *NOT* mean we handle all new features of ONFI versions
above 1.0.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Acked-by: NFlorian Fainelli <ffainelli@freebox.fr>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

We have the order of the conditional wrong for choosing the ONFI chip name
vs. the ID table name. Without this fix, we will almost *always* choose a
NULL string to print out instead of the correct one.

This has already been suggested by Matthieu Castet.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Acked-by: NFlorian Fainelli <ffainelli@freebox.fr>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

In its current form, the driver may interfere with different hardware on
different boards if built into the kernel, hence is not suitable for
inclusion into a defconfig, inteded to be usable with multiple OMAP1 cpu and
machine types.

Convert it to a platform driver, that should be free from this issue.

Created and tested against linux-2.6.37-rc5 on Amstrad Delta.
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This reverts commit e14feafb.

The commit limits the maximum amount of bytes which can be read
at one go to the OOB size, which is incorrect, because mtd->read_oob()
allows reading multiple pages at a time, see comment near
"struct mtd_oob_ops" at include/linux/mtd/mtd.h. So this patch
breaks ABI and hence, has to be reverted.
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Commit 2c01946c (omap3 nand: cleanup
virtual address usages) wrongly enabled CONFIG_MTD_NAND_OMAP_HWECC
which breaks boards like beagle and pandora that use software ECC
for write.

Boards like beagle and pandora uses sw ecc for write (e.g. binary flushed
from u-boot) and read from kernel.
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The FSMC actually has a standard ARM PrimeCell ID register, and
the "revision" part of that register contains the thing that
the code is looking at. Reuse the infrastructure from the AMBA
bus abstraction and rid local defines.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This removes the PARTITION macro that David didn't like and also
removes a local variable that was dangling unused in some #ifdefs
by being a bit more clever.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

If CONFIG_MTD_PARTITIONS is not selected, then the following warning is generated:

  CC      drivers/mtd/nand/mxc_nand.o
drivers/mtd/nand/mxc_nand.c: In function 'mxcnd_probe':
drivers/mtd/nand/mxc_nand.c:1014: warning: unused variable 'nr_parts'

Fix it by marking nr_parts as __maybe_unused.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch should fix the following problem:
 1. the  jffs2-image update in the u-boot was ok
 2. first restart and first mount of the NAND-flash-partition was also ok
 3. before the restart of controller there are no any activity on NAND-flash except of the jffs2_gcd_mtdX-process ...
 4. BUT after the second restart the NAND-flash-partition could not be really used after the second mount,
    dmesg filled with messages:
...
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x03ce0000: 0xc0ff instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x03d00000: 0xc0ff instead
....
Just for for info:
the behaviour observed on mpc8313-based board with the large-page NAND.
The only activity on NAND-flash was the garbage collector process, that looks for CLEANMARKER-nodes

As Scott said it was broken by commit 3ab8f2a2Signed-off-by: NSergej Stepanov <Sergej.Stepanov@ids.de>
--
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

When run mtd_oobtest case, there will be one error for step(4),
which turned out it need add one check for out of page read in
nand_do_read_oob just like mtd_do_write_oob did it already.
This commit also fix one typo error for comments in mtd_do_write_oob
Signed-off-by: NJason Liu <r64343@freescale.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Warning(include/linux/mtd/nand.h:543): No description found for parameter 'badblockbits'
Warning(drivers/mtd/nand/nand_bbt.c:1101): No description found for parameter 'mtd'
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Cc:	David Woodhouse <dwmw2@infradead.org>
Cc:	linux-mtd@lists.infradead.org
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Using %pR standardizes the struct resource output.
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Now that the mtd core supports more then 64 ecc bytes we can use it instead of
some a custom hack in the jz4740 nand driver.
This patch removes the custom {read,write}_page handlers from the jz4740 nand
driver. Thus the driver will now fallback to the default handlers from the nand
core.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Nsrimugunthan  <srimugunthan.dhandapani@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

When system uses 36bit physical address, res.start is 36bit
physical address. But the function of in_be32 returns 32bit
physical address. Then both of them compared each other is
wrong. So by converting the address of res.start into
the right format fixes this issue.
Signed-off-by: NLan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Reviewed-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Move Freescale elbc interrupt from nand driver to elbc driver.
Then all elbc devices can use the interrupt instead of ONLY nand.

For former nand driver, it had the two functions:

1. detecting nand flash partitions;
2. registering elbc interrupt.

Now, second function is removed to fsl_lbc.c.
Signed-off-by: NLan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Reviewed-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Cc: Wood Scott-B07421 <B07421@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

RAW writes were broken by 782ce79a
which introduced a check of ops->ooboffs in nand_do_write_ops().

When writing in RAW mode this is called with an ops struct on the stack
of mtdchar.c:mtd_write() which does not initialise ops->ooboffs, so it
is garbage and fails this test.

This test does not make sense if ops->oobbuf is NULL, which it is in the
RAW write path, so include that in the test.
Signed-off-by: NJon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

It turns out that pci core now handles these, so this code is redundant
and can even cause bugs
Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The bbt structure isn't actually used, just the badblockpos.  This lets
the driver correctly handle badblocks with the different OOB layout with
certain sized flashes.  Previously, the blocks would all be reported as
bad and be completely unusable.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch fixes sparse warning for static declaration of variable "use_dma"

drivers/mtd/nand/omap2.c:114:11: warning: symbol 'use_dma' was not declared. Should it be static?
Signed-off-by: NG, Manjunath Kondaiah <manjugk@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds the appropriate conversions to correct the endianness
issues in the MTD driver whenever it accesses the device tree (which is
always big endian).
Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

I used this to check the BBT on flash together with a hack in mtdchar in
order to read bad blocks.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

it will create an empty BBT table without considering vendor's BBT
information. Vendor's information may be unavailable if the NAND
controller has a different DATA & OOB layout or this information may be
allready purged.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The first (sixt) byte in the OOB area contains vendor's bad block
information. During identification of the NAND chip this information is
collected by scanning the complete chip.
The option NAND_USE_FLASH_BBT is used to store this information in a sector so
we don't have to scan the complete flash. Unfortunately the code stores
a marker in order to recognize the BBT in the OOB area. This will fail
if the OOB area is completely used for ECC.
This patch introduces the option NAND_USE_FLASH_BBT_NO_OOB which has to be
used with NAND_USE_FLASH_BBT. It will then store BBT on flash without
touching the OOB area. The BBT format on flash remains same except the
first page starts with the recognition pattern followed by the version byte.
This change was tested in nandsim and it looks good so far :)
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

No code change.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Not all the NAND devices have all the information in additional
id bytes.

So add a hook in the nand_chip{} is a good method to calculate the
right value of oobsize, erasesize and so on.

Without the hook,you will get the wrong value, and you have to hack
in the ->scan_bbt() to change the wrong value which make the code
mess.
Signed-off-by: NHuang Shijie <shijie8@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>