1. 12 6月, 2017 1 次提交
    • M
      Bluetooth: Send HCI Set Event Mask Page 2 command only when needed · 313f6888
      Marcel Holtmann 提交于
      The Broadcom BCM20702 Bluetooth controller in ThinkPad-T530 devices
      report support for the Set Event Mask Page 2 command, but actually do
      return an error when trying to use it.
      
        < HCI Command: Read Local Supported Commands (0x04|0x0002) plen 0
        > HCI Event: Command Complete (0x0e) plen 68
             Read Local Supported Commands (0x04|0x0002) ncmd 1
               Status: Success (0x00)
               Commands: 162 entries
                 ...
                 Set Event Mask Page 2 (Octet 22 - Bit 2)
                 ...
      
        < HCI Command: Set Event Mask Page 2 (0x03|0x0063) plen 8
               Mask: 0x0000000000000000
        > HCI Event: Command Complete (0x0e) plen 4
             Set Event Mask Page 2 (0x03|0x0063) ncmd 1
               Status: Unknown HCI Command (0x01)
      
      Since these controllers do not support any feature that would require
      the event mask page 2 to be modified, it is safe to not send this
      command at all. The default value is all bits set to zero.
      
      T:  Bus=01 Lev=02 Prnt=02 Port=03 Cnt=03 Dev#=  9 Spd=12   MxCh= 0
      D:  Ver= 2.00 Cls=ff(vend.) Sub=01 Prot=01 MxPS=64 #Cfgs=  1
      P:  Vendor=0a5c ProdID=21e6 Rev= 1.12
      S:  Manufacturer=Broadcom Corp
      S:  Product=BCM20702A0
      S:  SerialNumber=F82FA8E8CFC0
      C:* #Ifs= 4 Cfg#= 1 Atr=e0 MxPwr=  0mA
      I:* If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=81(I) Atr=03(Int.) MxPS=  16 Ivl=1ms
      E:  Ad=82(I) Atr=02(Bulk) MxPS=  64 Ivl=0ms
      E:  Ad=02(O) Atr=02(Bulk) MxPS=  64 Ivl=0ms
      I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=   0 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=   0 Ivl=1ms
      I:  If#= 1 Alt= 1 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=   9 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=   9 Ivl=1ms
      I:  If#= 1 Alt= 2 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=  17 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=  17 Ivl=1ms
      I:  If#= 1 Alt= 3 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=  25 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=  25 Ivl=1ms
      I:  If#= 1 Alt= 4 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=  33 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=  33 Ivl=1ms
      I:  If#= 1 Alt= 5 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=btusb
      E:  Ad=83(I) Atr=01(Isoc) MxPS=  49 Ivl=1ms
      E:  Ad=03(O) Atr=01(Isoc) MxPS=  49 Ivl=1ms
      I:* If#= 2 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=btusb
      E:  Ad=84(I) Atr=02(Bulk) MxPS=  32 Ivl=0ms
      E:  Ad=04(O) Atr=02(Bulk) MxPS=  32 Ivl=0ms
      I:* If#= 3 Alt= 0 #EPs= 0 Cls=fe(app. ) Sub=01 Prot=01 Driver=(none)
      Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>
      Reported-by: NSedat Dilek <sedat.dilek@gmail.com>
      Tested-by: NSedat Dilek <sedat.dilek@gmail.com>
      Signed-off-by: NSzymon Janc <szymon.janc@codecoup.pl>
      313f6888
  2. 10 6月, 2017 3 次提交
  3. 09 6月, 2017 35 次提交
  4. 08 6月, 2017 1 次提交
    • D
      Merge branch 'dsa-add-cross-chip-VLAN-support' · 6c8607eb
      David S. Miller 提交于
      Vivien Didelot says:
      
      ====================
      net: dsa: add cross-chip VLAN support
      
      The current code in DSA does not support cross-chip VLAN. This means
      that in a multi-chip environment such as this one (similar to ZII Rev B)
      
               [CPU].................... (mdio)
          (eth0) |   :       :          :
                _|_____    _______    _______
               [__sw0__]--[__sw1__]--[__sw2__]
                |  |  |    |  |  |    |  |  |
                v  v  v    v  v  v    v  v  v
                p1 p2 p3   p4 p5 p6   p7 p8 p9
      
      adding a VLAN to p9 won't be enough to reach the CPU, until at least one
      port of sw0 and sw1 join the VLAN as well and become aware of the VID.
      
      This patchset makes the DSA core program the VLAN on the CPU and DSA
      links itself, which brings seamlessly cross-chip VLAN support to DSA.
      
      With this series applied*, the hardware VLAN tables of a 3-switch setup
      look like this after adding a VLAN to only one port of the end switch:
      
          # cat /sys/class/net/br0/bridge/default_pvid
          42
          # cat /sys/kernel/debug/mv88e6xxx/sw{0,1,2}/vtu
          # ip link set up master br0 dev lan6
          # cat /sys/kernel/debug/mv88e6xxx/sw{0,1,2}/vtu
           VID  FID  SID  0  1  2  3  4  5  6
            42    1    0  x  x  x  x  x  =  =
           VID  FID  SID  0  1  2  3  4  5  6
            42    1    0  x  x  x  x  x  =  =
           VID  FID  SID  0  1  2  3  4  5  6  7  8  9
            42    1    0  u  x  x  x  x  x  x  x  x  =
      
      ('x' is excluded, 'u' is untagged, '=' is unmodified DSA and CPU ports.)
      
      Completely removing a VLAN entry (which is currently the responsibility
      of drivers anyway) is not supported yet since it requires some caching.
      
      (*) the output is shown from this out-of-tree debugfs patch:
      https://github.com/vivien/linux/commit/7b61a684b9d6b6a499135a587c7f62a1fddceb8b.patch
      
      Changes in v2:
        - canonical incrementation (port++ instead of ++port)
        - check CPU and DSA ports before purging a VLAN
        - add Reviewed-by tags
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6c8607eb